J-Flash reports Could not find CFI compliant flash device when Flash device info option enables Automatically detect flash memory.

1. This is legacy hardware where the MCU = NXP MC9328MXL.
   
2. MCU has NO internal SRAM.
   
3. Board uses 2 Micron MT48LC64M4A2 16-bit SDRAM. Board wired for 32-bit bus.
   
4. Board uses two (2) Spansion S29PL127J 16-bit flash devices. Board wired for 32-bit bus.
   
5. J-Flash v6.82 has a bug requiring RAM available for RAMcode even when only task to read flash.
   
6. I have successfully configured J-Flash with MCU Init. steps to initialize the external SRAM.
   
7. I have successfully configured J-Flash to read the external NOR flash.
   
8. I had to trick J-Flash to complete Item 7 disabling Automatically detect flash memory.
   
9. I had to trick J-Flash to complete Item 7 by selecting the wrong flash device. Instead of selecting the correct S29PL127J 16MB device, I was forced to use the S29GL256P 32MB device just so J-Flash would use the correct address range.
   

My conclusion is that J-Flash does not include an obvious method to change the bus width from 16 to 32 bits. This is necessary for a board layout from 2005 that works without issue and can be programmed by a legacy Atrium ICE (no longer available) without issue in the past. I have been able to use J-Link Commander to perform the following:

1. Flash Reset
   
2. Read Manufacturing ID.
   
3. Flash Chip Erase
   

To accomplish flash functions, I doubled-up the data being sent to the NOR flash. For example, the 16-bit value for Flash Reset is 0x00F0. The 32-bit value for Flash Reset is 0x00F000F0. It is important to realize the implication here. 32-bit Address zero access the first two address locations of the first chip and the first two address locations of the second chip. Thus for chip 1, 8-bit address locations 0h and 1h are consumed. The same thing is true for the second chip. The 8-bit address locations 2h and 3h, are accessed using 32-bit address 0x00000004.

Any thoughts on how to configure J-Flash so that it understands that there are two 16-bit devices while accessing them using 32-bit address values? The flash bank feature does not appear to support this approach because it expects the address locations to be linear.