Hi,also me,last posts closed.
JLink EDU version.
I want to know how to erase external flash via Jlink or Jflash.
I have a custom board with an STM32H750IB processor and Micron 64MB(MT25QL512) external Nor flash.The Nor flash connect to the processor by QSPI interface.
When i erase the custom board flash,only internal flash on STM32H750IB erase ok,external Nor flash erase fail.
============================================================================================================================================
log by Jlink.exe
SEGGER J-Link Commander V6.82c (Compiled Jul 31 2020 17:37:56)
DLL version V6.82c, compiled Jul 31 2020 17:36:49
Connecting to J-Link via USB...O.K.
Firmware: J-Link V9 compiled Dec 13 2019 11:14:50
Hardware version: V9.30
S/N: 269308380
License(s): FlashBP, GDB
OEM: SEGGER-EDU
VTref=3.319V
Type "connect" to establish a target connection, '?' for help
J-Link>connect
Please specify device / core. <Default>: STM32H750IB
Type '?' for selection dialog
Device>STM32H750IB
Please specify target interface:
J) JTAG (Default)
S) SWD
T) cJTAG
TIF>S
Specify target interface speed [kHz]. <Default>: 4000 kHz
Speed>4000
Device "STM32H750IB" selected.
Connecting to target via SWD
Found SW-DP with ID 0x6BA02477
Found SW-DP with ID 0x6BA02477
Unknown DP version. Assuming DPv0
Scanning AP map to find all available APs
AP[3]: Stopped AP scan as end of AP map has been reached
AP[0]: AHB-AP (IDR: 0x84770001)
AP[1]: AHB-AP (IDR: 0x84770001)
AP[2]: APB-AP (IDR: 0x54770002)
Iterating through AP map to find AHB-AP to use
AP[0]: Core found
AP[0]: AHB-AP ROM base: 0xE00FE000
CPUID register: 0x411FC271. Implementer code: 0x41 (ARM)
Found Cortex-M7 r1p1, Little endian.
FPUnit: 8 code (BP) slots and 0 literal slots
CoreSight components:
ROMTbl[0] @ E00FE000
ROMTbl[0][0]: E00FF000, CID: B105100D, PID: 000BB4C7 ROM Table
ROMTbl[1] @ E00FF000
ROMTbl[1][0]: E000E000, CID: B105E00D, PID: 000BB00C SCS-M7
ROMTbl[1][1]: E0001000, CID: B105E00D, PID: 000BB002 DWT
ROMTbl[1][2]: E0002000, CID: B105E00D, PID: 000BB00E FPB-M7
ROMTbl[1][3]: E0000000, CID: B105E00D, PID: 000BB001 ITM
ROMTbl[0][1]: E0041000, CID: B105900D, PID: 001BB975 ETM-M7
ROMTbl[0][2]: E0043000, CID: B105900D, PID: 004BB906 CTI
Cache: Separate I- and D-cache.
I-Cache L1: 16 KB, 256 Sets, 32 Bytes/Line, 2-Way
D-Cache L1: 16 KB, 128 Sets, 32 Bytes/Line, 4-Way
Cortex-M7 identified.
J-Link>erase
Erasing device...
J-Link: Flash download: Only internal flash banks will be erased.
To enable erasing of other flash banks like QSPI or CFI, it needs to be enabled via "exec EnableEraseAllFlashBanks"
J-Link: Flash download: Total time needed: 5.190s (Prepare: 0.157s, Compare: 0.000s, Erase: 5.027s, Program: 0.000s, Verify: 0.000s, Restore: 0.005s)
Erasing done.
J-Link>exec EnableEraseAllFlashBanks
J-Link>erase
Erasing device...
J-Link: Flash download: Total time needed: 5.085s (Prepare: 0.092s, Compare: 0.000s, Erase: 4.964s, Program: 0.000s, Verify: 0.000s, Restore: 0.029s)
J-Link: Flash download: Total time needed: 0.171s (Prepare: 0.130s, Compare: 0.000s, Erase: 0.041s, Program: 0.000s, Verify: 0.000s, Restore: 0.000s)
****** Error: Failed to erase sectors.
ERROR: Erase returned with error code -5.
=====================================================================================================================================
JLink EDU version have no access to Jflash,so I use Jflash Lite for erase.
I found the Jflash Lite can only erase internal flash.
Write .hex file to external flash also fail.
=====================================================================================================================================
I found a way to erase spi nor flash by jflashspi,it works fine only the flash is nar flash,fail to erase nand flash.
=====================================================================================================================================
I want to know the meaning of error code -5 when erase by Jlink.
Thanks for your attention.
JLink EDU version.
I want to know how to erase external flash via Jlink or Jflash.
I have a custom board with an STM32H750IB processor and Micron 64MB(MT25QL512) external Nor flash.The Nor flash connect to the processor by QSPI interface.
When i erase the custom board flash,only internal flash on STM32H750IB erase ok,external Nor flash erase fail.
============================================================================================================================================
log by Jlink.exe
SEGGER J-Link Commander V6.82c (Compiled Jul 31 2020 17:37:56)
DLL version V6.82c, compiled Jul 31 2020 17:36:49
Connecting to J-Link via USB...O.K.
Firmware: J-Link V9 compiled Dec 13 2019 11:14:50
Hardware version: V9.30
S/N: 269308380
License(s): FlashBP, GDB
OEM: SEGGER-EDU
VTref=3.319V
Type "connect" to establish a target connection, '?' for help
J-Link>connect
Please specify device / core. <Default>: STM32H750IB
Type '?' for selection dialog
Device>STM32H750IB
Please specify target interface:
J) JTAG (Default)
S) SWD
T) cJTAG
TIF>S
Specify target interface speed [kHz]. <Default>: 4000 kHz
Speed>4000
Device "STM32H750IB" selected.
Connecting to target via SWD
Found SW-DP with ID 0x6BA02477
Found SW-DP with ID 0x6BA02477
Unknown DP version. Assuming DPv0
Scanning AP map to find all available APs
AP[3]: Stopped AP scan as end of AP map has been reached
AP[0]: AHB-AP (IDR: 0x84770001)
AP[1]: AHB-AP (IDR: 0x84770001)
AP[2]: APB-AP (IDR: 0x54770002)
Iterating through AP map to find AHB-AP to use
AP[0]: Core found
AP[0]: AHB-AP ROM base: 0xE00FE000
CPUID register: 0x411FC271. Implementer code: 0x41 (ARM)
Found Cortex-M7 r1p1, Little endian.
FPUnit: 8 code (BP) slots and 0 literal slots
CoreSight components:
ROMTbl[0] @ E00FE000
ROMTbl[0][0]: E00FF000, CID: B105100D, PID: 000BB4C7 ROM Table
ROMTbl[1] @ E00FF000
ROMTbl[1][0]: E000E000, CID: B105E00D, PID: 000BB00C SCS-M7
ROMTbl[1][1]: E0001000, CID: B105E00D, PID: 000BB002 DWT
ROMTbl[1][2]: E0002000, CID: B105E00D, PID: 000BB00E FPB-M7
ROMTbl[1][3]: E0000000, CID: B105E00D, PID: 000BB001 ITM
ROMTbl[0][1]: E0041000, CID: B105900D, PID: 001BB975 ETM-M7
ROMTbl[0][2]: E0043000, CID: B105900D, PID: 004BB906 CTI
Cache: Separate I- and D-cache.
I-Cache L1: 16 KB, 256 Sets, 32 Bytes/Line, 2-Way
D-Cache L1: 16 KB, 128 Sets, 32 Bytes/Line, 4-Way
Cortex-M7 identified.
J-Link>erase
Erasing device...
J-Link: Flash download: Only internal flash banks will be erased.
To enable erasing of other flash banks like QSPI or CFI, it needs to be enabled via "exec EnableEraseAllFlashBanks"
J-Link: Flash download: Total time needed: 5.190s (Prepare: 0.157s, Compare: 0.000s, Erase: 5.027s, Program: 0.000s, Verify: 0.000s, Restore: 0.005s)
Erasing done.
J-Link>exec EnableEraseAllFlashBanks
J-Link>erase
Erasing device...
J-Link: Flash download: Total time needed: 5.085s (Prepare: 0.092s, Compare: 0.000s, Erase: 4.964s, Program: 0.000s, Verify: 0.000s, Restore: 0.029s)
J-Link: Flash download: Total time needed: 0.171s (Prepare: 0.130s, Compare: 0.000s, Erase: 0.041s, Program: 0.000s, Verify: 0.000s, Restore: 0.000s)
****** Error: Failed to erase sectors.
ERROR: Erase returned with error code -5.
=====================================================================================================================================
JLink EDU version have no access to Jflash,so I use Jflash Lite for erase.
I found the Jflash Lite can only erase internal flash.
Write .hex file to external flash also fail.
=====================================================================================================================================
I found a way to erase spi nor flash by jflashspi,it works fine only the flash is nar flash,fail to erase nand flash.
=====================================================================================================================================
I want to know the meaning of error code -5 when erase by Jlink.
Thanks for your attention.
The post was edited 1 time, last by alivexiaoluo ().