ES on A && M cores same time

    This site uses cookies. By continuing to browse this site, you are agreeing to our Cookie Policy.

    • ES on A && M cores same time

      I've previously used Studio on Cortex M only. I see it supports Cortex A too.

      But does it support or integrate in a seamless way debug on multi heterogeneous cores?
      For example, debugging concurrently on A and M targets, in same running IDE instance. (Same JLink of course).

      Also, does it do in a seamless flawless way multi-core debug on symmetric A cores? What I would expect is, same instance IDE, same session running, ability to insert break-points in _single_ instance and not re-load per-core, ability to stop/ start each core from same IDE instance.

      I know I can setup all multi-core debug with my JLink/JTrace, but , integration to an IDE can be challenging. Or , running multiple Ozone instances is extremely sub-optimal ..
    • Hello v01d,


      we had also the same problem, so I think I can answer your question.

      Quick answer: No it is not possible.


      The problem is not Embedded Studio, but the J-Link Adapter.

      We had the same problem with a different Development Environment which supports what you are requesting for. However, we couldn’t use it as the JTAG-Adapter has to support multi-core debugging. J-Link doesn’t ☹. Therefore, we had to switch to a different vendor. Hope Segger is adding this feature as we would like to use the J-Links.

      A different Solution would be to debug each core with an own instance of embedded Studio. This should work but wasn’t a solution for us.


      Hope this helps.

      Best Regards
    • Masmiseim wrote:



      Quick answer: No it is not possible.

      Hi Masmiseim,

      I do not think I understand you. Because, I _can_ connect & debug multi-core (multi ARM A core) to be specifically, on a SoC I used. Not only that, but with single JTAG I can connect to 2 A cores (SMP config) and one M core at the same time (for AMP thus).
      Effectively , I can have 3 simultaneous core debug with single JTAG & software.

      The problem is it does not integrate well with any higher level software tools I use. And even from Segger.
    • Hello v01d,

      v01d wrote:


      I do not think I understand you. Because, I _can_ connect & debug multi-core (multi ARM A core) to be specifically, on a SoC I used. Not only that, but with single JTAG I can connect to 2 A cores (SMP config) and one M core at the same time (for AMP thus).

      within a single instance of … whatever software you are using?


      It is possible to connect to multiple cores of a single controller with a single J-Link adapter. But you have to use multiple instances of the Application; one for each core.

      Accessing multiple cores within a single instance of the Application is not possible as far as I have understood it. That was what you have asking for, correct?


      Best Regards
    • Masmiseim wrote:

      But you have to use multiple instances of the Application; one for each core.

      If we take say lowest Application involved here, for me that would be Segger JLinkGDB, then yes exactly, one per core. (one JLink hw for all target cores).

      Masmiseim wrote:

      Accessing multiple cores within a single instance of the Application is not possible as far as I have understood it. ...
      Ok, then we on the same page length , I think.

      I think, JLinkGDB not supporting multi-core per it's single instance is quite a limitation. At higher app level, I sort of get through by running multiple debug sessions within same IDE say.
      That is why in my original post, I was asking if perhaps Segger's IDE has done it in a nice way now, for "seamless" (excuse my marketing term) multi-core debug session.

      On the other hand, I had 0 / zero luck to run multiple sessions when _not_ using JLinkGDB, as with Ozone for example. I do not know all details but Ozone must be using directly
      JLink through JLink shared library, with no GDB proto in-between, and I kind of thought that may work better. But no, not so far for me. It seems each active instance of Ozone locks my
      JLink hw and doesn't allow other Ozone's to use it. So that's a no go entirely for multi-core.

      I don't know if seamless at higher app level ( above JlinkGDB) is how this is supposed to work on related cores. Say if I run one OS kernel in SMP configuration on 2 A cores, I would much like to work with it as one target.
      (eg. breaking in, stepping cores).

      I wonder how ARM DS does it, but they apparently have it all covered. Likely requires their own monitor, otherwise I would give it a go to test.