[SOLVED] J-Flash - Failed to erase chip

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  • [SOLVED] J-Flash - Failed to erase chip

    Hi,

    I am using J-Link Pro on an STM32F412 and I am trying to erase the chip with J-Flash.

    If I select Target -> Manual Programming -> Erase Chip, I get a pop-up dialog doing some work and then an error message pop-up telling me, erasing had failed. The log says:


    Erasing chip ...
    - 264 sectors, 2 ranges, 0x8000000 - 0x807FFFF, 0x90000000 - 0x90FFFFFF
    - Start of preparing flash programming
    - End of preparing flash programming
    - Start of determining dirty areas in flash cache
    - End of determining dirty areas
    - CPU is running at 72000 kHz.
    - Chip erase not supported for flash bank @ 0x08000000. Switched to sector erase
    - Start of determining dirty areas in flash cache
    - End of determining dirty areas
    - Start of erasing sectors
    - Blank checking 0x08000000 - 0x0800FFFF
    - Erasing range 0x08000000 - 0x0800FFFF ( 4 Sectors, 64 KB)
    - Blank checking 0x08010000 - 0x0801FFFF
    - Erasing range 0x08010000 - 0x0801FFFF ( 1 Sector, 64 KB)
    - Blank checking 0x08020000 - 0x0803FFFF
    - Erasing range 0x08020000 - 0x0803FFFF ( 1 Sector, 128 KB)
    - Blank checking 0x08040000 - 0x0805FFFF
    - Blank checking 0x08060000 - 0x0807FFFF
    - End of erasing sectors
    - Start of restoring
    - End of restoring
    - Start of determining flash info (Bank 1 @ 0x90000000)
    - End of determining flash info
    - Flash bank info:
    - 256 * 64 KB @ 0x90000000
    - Start of preparing flash programming
    - End of preparing flash programming
    - Start of determining dirty areas in flash cache
    - End of determining dirty areas
    - CPU speed could not be measured.
    - Chip erase not supported for flash bank @ 0x90000000. Switched to sector erase
    - Start of determining dirty areas in flash cache
    - End of determining dirty areas
    - Start of erasing sectors
    - Erasing range 0x90000000 - 0x9001FFFF ( 2 Sectors, 128 KB)
    - ERROR: Failed to erase sectors.
    - End of erasing sectors
    - ERROR: Erase failed
    - Start of restoring
    - End of restoring
    - ERROR: Failed to erase chip

    However, Target -> Manual Programming -> Download & Verify works just fine.

    Any idea what is going on?

    Thanks.

    Kind regards

  • Hi,
    Thank you for your inquiry.
    Such an issue is not known to us.

    Do you use custom hardware or an evaluation board? In the latter case which one?
    If custom hardware, do you experience the same problem on an evaluation board?

    Could you please send us a J-Link log file? How to enable:
    wiki.segger.com/J-Link_DLL#Enable_J-Link_Log_File

    Could you please erase the target via J-Link Commander and tell us if it works?:
    - Open the J-Link commander
    - Connect to the target
    - Write "erase" to erase the device (without quotations)

    Best regards,
    Fabian
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.

  • Hi,

    thanks for your answer.

    It is a custom board. I do not have an eval board at hand. I can test with one over the week end and will add the results here then.

    In J-Link Commander (connected via SWD), erasing finished successfully.


    J-Link>connect
    Please specify device / core. <Default>: STM32F412CE
    Type '?' for selection dialog
    Device>
    Please specify target interface:
    J) JTAG (Default)
    S) SWD
    T) cJTAG
    TIF>s
    Specify target interface speed [kHz]. <Default>: 4000 kHz
    Speed>
    Device "STM32F412CE" selected.

    Connecting to target via SWD
    Found SW-DP with ID 0x2BA01477
    Found SW-DP with ID 0x2BA01477
    Scanning AP map to find all available APs
    AP[1]: Stopped AP scan as end of AP map has been reached
    AP[0]: AHB-AP (IDR: 0x24770011)
    Iterating through AP map to find AHB-AP to use
    AP[0]: Core found
    AP[0]: AHB-AP ROM base: 0xE00FF000
    CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
    Found Cortex-M4 r0p1, Little endian.
    FPUnit: 6 code (BP) slots and 2 literal slots
    CoreSight components:
    ROMTbl[0] @ E00FF000
    ROMTbl[0][0]: E000E000, CID: B105E00D, PID: 000BB00C SCS-M7
    ROMTbl[0][1]: E0001000, CID: B105E00D, PID: 003BB002 DWT
    ROMTbl[0][2]: E0002000, CID: B105E00D, PID: 002BB003 FPB
    ROMTbl[0][3]: E0000000, CID: B105E00D, PID: 003BB001 ITM
    ROMTbl[0][4]: E0040000, CID: B105900D, PID: 000BB9A1 TPIU
    ROMTbl[0][5]: E0041000, CID: B105900D, PID: 000BB925 ETM
    Cortex-M4 identified.
    J-Link>erase
    Erasing device...
    J-Link: Flash download: Only internal flash banks will be erased.
    To enable erasing of other flash banks like QSPI or CFI, it needs to be enabled via "exec EnableEraseAllFlashBanks"
    J-Link: Flash download: Total time needed: 7.986s (Prepare: 0.024s, Compare: 0.000s, Erase: 7.958s, Program: 0.000s, Verify: 0.000s, Restore: 0.004s)
    Erasing done.


    The J-Link log file is attached.


    /Edit: I connected the J-Link to an STM32F103C8 (blue pill) today and it can be erased just fine with Commander and J-Flash.


    Thanks and regards.
    Files

    • JLinkARM.log

      (30.49 kB, downloaded 354 times, last: )

    The post was edited 1 time, last by icwiener ().

  • Hi,

    Does erasing with the J-Link Commander work when using the command "exec EnableEraseAllFlashBanks" (w.o. quotations)?
    After erasing the target with the J-Link Commander, does the problem still persist with J-Flash?


    Best regards,
    Fabian
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.

  • Hi,

    thanks for your suggestion.


    EDIT: Sorry, this seems to be an unrelated issue. I will update this post once I have new information.
    EDIT2: I just tried it again and the error is still as shown below.

    erase failes here after issuing that command. Here is the output.


    SEGGER J-Link Commander V6.62 (Compiled Jan 24 2020 16:32:43)
    DLL version V6.62, compiled Jan 24 2020 16:32:09

    Connecting to J-Link via USB...O.K.
    Firmware: J-Link Pro V4 compiled Jan 7 2020 16:52:59
    Hardware version: V4.00
    S/N: 174505828
    License(s): RDI, FlashBP, FlashDL, JFlash, GDB
    IP-Addr: DHCP (no addr. received yet)
    VTref=3.332V

    Type "connect" to establish a target connection, '?' for help
    J-Link>connect
    Please specify device / core. <Default>: STM32F412CE
    Type '?' for selection dialog
    Device>
    Please specify target interface:
    J) JTAG (Default)
    S) SWD
    T) cJTAG
    TIF>s
    Specify target interface speed [kHz]. <Default>: 4000 kHz
    Speed>
    Device "STM32F412CE" selected.

    Connecting to target via SWD
    Found SW-DP with ID 0x2BA01477
    Found SW-DP with ID 0x2BA01477
    DPIDR: 0x2BA01477
    Scanning AP map to find all available APs
    AP[1]: Stopped AP scan as end of AP map has been reached
    AP[0]: AHB-AP (IDR: 0x24770011)
    Iterating through AP map to find AHB-AP to use
    AP[0]: Core found
    AP[0]: AHB-AP ROM base: 0xE00FF000
    CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
    Found Cortex-M4 r0p1, Little endian.
    FPUnit: 6 code (BP) slots and 2 literal slots
    CoreSight components:
    ROMTbl[0] @ E00FF000
    ROMTbl[0][0]: E000E000, CID: B105E00D, PID: 000BB00C SCS-M7
    ROMTbl[0][1]: E0001000, CID: B105E00D, PID: 003BB002 DWT
    ROMTbl[0][2]: E0002000, CID: B105E00D, PID: 002BB003 FPB
    ROMTbl[0][3]: E0000000, CID: B105E00D, PID: 003BB001 ITM
    ROMTbl[0][4]: E0040000, CID: B105900D, PID: 000BB9A1 TPIU
    ROMTbl[0][5]: E0041000, CID: B105900D, PID: 000BB925 ETM
    Cortex-M4 identified.
    J-Link>exec EnableEraseAllFlashBanks
    J-Link>erase
    Erasing device...

    ****** Error: Failed to prepare for programming.
    RAM check failed @ addr 0x200012F8.
    RAM check failed while testing 0x2050 bytes @ addr 0x200006CC.
    ERROR: Erase returned with error code -1.
    J-Link>

    The post was edited 2 times, last by icwiener ().

  • Hi,
    Do you have any peripheral flash connected to the chip at address 0x90000000?
    Could you please check, that there are no flash banks enabled in the J-Flash project, that are not accessible?
    You can do so here:



    Best regards,
    Fabian
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.

  • Hi,

    thanks for the hint and sorry for the delay .. busy times. :)

    In the Project Settings dialog I can see:
    - Bank0: Base Addr 08000000
    - Bank1: Base Addr 90000000


    If I understand it correctly, Bank1 is only an interface to an optional external flash? If so, we do not have it.

    Is this enabled in J-Flash by default and the user has to disable it according to his needs?

    With Bank1 disabled (the checkbox at the lower end of the settings page), erasing the chip finishes successfully.

    Best regards

    The post was edited 1 time, last by icwiener ().

  • Hi,
    The flash bank enabled by default is Bank0, which is the internal flash.
    You only have to specifically change the flash bank if you do not want to use the internal flash.

    Is everything working as expected for you now?

    Best regards,
    Fabian
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.

  • Hi,

    yes this is expected. You have to make sure that you do not write to bank1 if there is no flash connected to it.

    We will consider this thread as closed now.

    Best regards,
    Fabian
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.