Can watchdog be paused when MMD is used for debugging?

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    • Can watchdog be paused when MMD is used for debugging?

      Hi,
      I want to check if watchdog is paused when debug hits a breakpoint in Monitor Mode Debugging. Based on my understanding, it will keep going and eventually reset the system. Is there a way to stop this from happening? I tried to reset watchdog timer in JLINK_MONITOR_OnPoll. I still see the system resets. Is there a better place to do that? Is there a way that I can know the system is running in MMD mode and don't start watchdog?

      Thank you,
      Min-Ching
    • Hello Min-Ching,
      Thank you for you r inquiry.

      The watchdog is not paused by our software. You have to implement the feeding/pausing of the watchdog yourself as part of the poll function.

      You can find further information about this topic in the J-Link manual UM08001_JLink.pdf in chapter 10 "Monitor Mode Debugging".
      This user manual is part of the J-Link Software and Documentation Pack.

      Best regards,
      Fabian
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      Keep in mind, this is not a support forum. Its main purpose is user to user interaction.
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    • Hi Fabian,

      When will JLINK_MONITOR_OnPoll be called? If I stopped at a breakpoint for very long time, will the watchdog still be fed from this function? The CPU I used can not pause the watchdog, but keep feeding it. I have seen several reset even when I have feed function called in JLINK_MONITOR_OnPoll. Did I miss anything?

      Min-Ching
    • Hello Min-Ching,

      What target device are you debugging exactly? Is it on custom hardware or eval board?
      If custom, do you see the same behaviour on an eval board?

      OnPoll is called periodically all the time when J-Link does not have to execute other commands. You can find the documentation of this in the monitor mode sources in the example project:
      segger.com/products/debug-prob…y/monitor-mode-debugging/

      If you still get resets even though your watchdog is fed properly, check if there are other timers or even second level watchdogs interfering here. Also check your board design if there is some external reset source that might issue the reset.

      Best regards,
      Nino
      Please read the forum rules before posting: Forum Rules

      Keep in mind, this is not a support forum. Its main purpose is user to user interaction.
      Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
      Should you be entitled to support you can contact us via our support system: segger.com/ticket/

      Or you can contact us via e-mail.