J-Link edu connection to Cortex-A53

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    • J-Link edu connection to Cortex-A53

      ve got a JTAG (J-Link more precisely) related problem. I'm trying to connect by J-Link to raspberry pi 3b+ (bare-metal). The probe finds the CPU and reads coresight ROM table, but there are missing information about Cross Trigger Interface (CTI). The units are available in the CPU according to ARM documentation. There is a possibility to write a special script for J-Link, to set up CPU but documentation is poor and I do not know how to do it.
      It there anyone who had or met with similar problem? Any advice how to run it?

      Below is output from run of JLinkExe with attempt to connect:

      Source Code

      1. ./JLinkExe
      2. SEGGER J-Link GDB Server V6.52c Command Line Version
      3. JLinkARM.dll V6.52c (DLL compiled Oct 11 2019 15:44:50)
      4. Command line: -if jtag -device Cortex-A53 -endian little -speed auto -port 2331 -swoport 2332 -telnetport 2333 -vd -ir -localhostonly 1 -singlerun -strict -timeout 0 -nogui -jlinkscriptfile /home/piotr/rpi.JLinkScript
      5. -----GDB Server start settings-----
      6. GDBInit file: none
      7. GDB Server Listening port: 2331
      8. SWO raw output listening port: 2332
      9. Terminal I/O port: 2333
      10. Accept remote connection: localhost only
      11. Generate logfile: off
      12. Verify download: on
      13. Init regs on start: on
      14. Silent mode: off
      15. Single run mode: on
      16. Target connection timeout: 0 ms
      17. ------J-Link related settings------
      18. J-Link Host interface: USB
      19. J-Link script: /home/piotr/rpi.JLinkScript
      20. J-Link settings file: none
      21. ------Target related settings------
      22. Target device: Cortex-A53
      23. Target interface: JTAG
      24. Target interface speed: auto
      25. Target endian: little
      26. Connecting to J-Link...
      27. J-Link is connected.
      28. Firmware: J-Link V10 compiled Oct 8 2019 14:57:57
      29. Hardware: V10.10
      30. S/N: 260111336
      31. OEM: SEGGER-EDU
      32. Feature(s): FlashBP, GDB
      33. Checking target voltage...
      34. Target voltage: 3.09 V
      35. Listening on TCP/IP port 2331
      36. Connecting to target...ERROR: CTI connected to core not found. Debugging not possible
      37. ERROR: CTI connected to core not found. Debugging not possible
      38. ERROR: Could not connect to target.
      39. Target connection failed. GDBServer will be closed...Restoring target state and closing J-Link connection...
      40. Shutting down...
      41. Could not connect to target.
      42. Please check power, connection and settings. piotr  /  opt  JLink  ./JLinkExe
      43. SEGGER J-Link Commander V6.52c (Compiled Oct 11 2019 15:44:58)
      44. DLL version V6.52c, compiled Oct 11 2019 15:44:50
      45. Connecting to J-Link via USB...O.K.
      46. Firmware: J-Link V10 compiled Oct 8 2019 14:57:57
      47. Hardware version: V10.10
      48. S/N: 260111336
      49. License(s): FlashBP, GDB
      50. OEM: SEGGER-EDU
      51. VTref=3.085V
      52. Type "connect" to establish a target connection, '?' for help
      53. J-Link>connect
      54. Please specify device / core. <Default>: CORTEX-A53
      55. Type '?' for selection dialog
      56. Device>
      57. Please specify target interface:
      58. J) JTAG (Default)
      59. S) SWD
      60. T) cJTAG
      61. TIF>J
      62. Device position in JTAG chain (IRPre,DRPre) <Default>: -1,-1 => Auto-detect
      63. JTAGConf>
      64. Specify target interface speed [kHz]. <Default>: 4000 kHz
      65. Speed>
      66. Device "CORTEX-A53" selected.
      67. Connecting to target via JTAG
      68. TotalIRLen = 4, IRPrint = 0x01
      69. JTAG chain detection found 1 devices:
      70. #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP
      71. Scanning AP map
      72. AP scan stopped (required AP found)
      73. AP[0]: APB-AP
      74. Scanning ROMTbl @ 0x80000000
      75. [0]Comp[0] @ 0x80010000: Cortex-A53
      76. [0]Comp[1] @ 0x80011000: PMU-A53
      77. [0]Comp[2] @ 0x80012000: Cortex-A53
      78. [0]Comp[3] @ 0x80013000: PMU-A53
      79. [0]Comp[4] @ 0x80014000: Cortex-A53
      80. [0]Comp[5] @ 0x80015000: PMU-A53
      81. [0]Comp[6] @ 0x80016000: Cortex-A53
      82. [0]Comp[7] @ 0x80017000: PMU-A53
      83. End of ROM table
      84. TotalIRLen = 4, IRPrint = 0x01
      85. JTAG chain detection found 1 devices:
      86. #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP
      87. Scanning AP map
      88. AP scan stopped (required AP found)
      89. AP[0]: APB-AP
      90. Scanning ROMTbl @ 0x80000000
      91. [0]Comp[0] @ 0x80010000: Cortex-A53
      92. [0]Comp[1] @ 0x80011000: PMU-A53
      93. [0]Comp[2] @ 0x80012000: Cortex-A53
      94. [0]Comp[3] @ 0x80013000: PMU-A53
      95. [0]Comp[4] @ 0x80014000: Cortex-A53
      96. [0]Comp[5] @ 0x80015000: PMU-A53
      97. [0]Comp[6] @ 0x80016000: Cortex-A53
      98. [0]Comp[7] @ 0x80017000: PMU-A53
      99. End of ROM table
      100. ****** Error: CTI connected to core not found. Debugging not possible
      101. TotalIRLen = 4, IRPrint = 0x01
      102. JTAG chain detection found 1 devices:
      103. #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP
      104. Scanning AP map
      105. AP scan stopped (required AP found)
      106. AP[0]: APB-AP
      107. Scanning ROMTbl @ 0x80000000
      108. [0]Comp[0] @ 0x80010000: Cortex-A53
      109. [0]Comp[1] @ 0x80011000: PMU-A53
      110. [0]Comp[2] @ 0x80012000: Cortex-A53
      111. [0]Comp[3] @ 0x80013000: PMU-A53
      112. [0]Comp[4] @ 0x80014000: Cortex-A53
      113. [0]Comp[5] @ 0x80015000: PMU-A53
      114. [0]Comp[6] @ 0x80016000: Cortex-A53
      115. [0]Comp[7] @ 0x80017000: PMU-A53
      116. End of ROM table
      117. TotalIRLen = 4, IRPrint = 0x01
      118. JTAG chain detection found 1 devices:
      119. #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP
      120. Scanning AP map
      121. AP scan stopped (required AP found)
      122. AP[0]: APB-AP
      123. Scanning ROMTbl @ 0x80000000
      124. [0]Comp[0] @ 0x80010000: Cortex-A53
      125. [0]Comp[1] @ 0x80011000: PMU-A53
      126. [0]Comp[2] @ 0x80012000: Cortex-A53
      127. [0]Comp[3] @ 0x80013000: PMU-A53
      128. [0]Comp[4] @ 0x80014000: Cortex-A53
      129. [0]Comp[5] @ 0x80015000: PMU-A53
      130. [0]Comp[6] @ 0x80016000: Cortex-A53
      131. [0]Comp[7] @ 0x80017000: PMU-A53
      132. End of ROM table
      133. ****** Error: CTI connected to core not found. Debugging not possible
      134. Cannot connect to target.
      Display All
      Also I'm not sure why there are 4 logs of CPU scanning (it is for each core of the CPU)?
    • Hello,

      Thank you for your inquiry.
      Please note that the Raspberry 3+ is not supported by us as a target device. As you suspected correctly you would need to initialize the device with a JLinkScript to take care of all target specific init steps that usually your Linux/Boot image would do.

      ppryga wrote:

      There is a possibility to write a special script for J-Link, to set up CPU but documentation is poor and I do not know how to do it.
      This is exactly the reason why we did not implement support. The Raspberry platform was simply not created to be debugged with an external probe. The Setup is quite tedious and documentation not available/poor.
      Please understand that we can't provide further assistance in such a case.

      Best regards,
      Nino
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