I am developing against a Nuvoton m2351 via their NuMaker PFM-M2351 board and trying to use a J-Link Base to flash both the secure and nonsecure regions. The .hex images flash properly when using the built-in Nu-Link-Me ICE bridge.
I have the secure and nonsecure regions partitioned out to evenly split available flash (256k each). Secure gets written to 0x0 without problems, but the nonsecure image fails because it is being written to 0x10040000 which is the nonsecure region (nonsecure region bit is set). Of course this board only has 512k of flash so the segger complains that it can't write to that address. If I remove the nonsecure region bit (0x00040000), it writes properly but the secure image doesn't recognize there is nonsecure code to jump to after booting.
Is there support for writing non-secure regions in the J-Link that I'm missing? Below is the j-link flash session.
Thank you!
Display All
I have the secure and nonsecure regions partitioned out to evenly split available flash (256k each). Secure gets written to 0x0 without problems, but the nonsecure image fails because it is being written to 0x10040000 which is the nonsecure region (nonsecure region bit is set). Of course this board only has 512k of flash so the segger complains that it can't write to that address. If I remove the nonsecure region bit (0x00040000), it writes properly but the secure image doesn't recognize there is nonsecure code to jump to after booting.
Is there support for writing non-secure regions in the J-Link that I'm missing? Below is the j-link flash session.
Thank you!
Source Code
- $ JLinkExe -if SWD -device M2351KIAAE -speed 10000 -ExitOnError 1 -CommandFile flash.jlinkscript
- SEGGER J-Link Commander V6.50a (Compiled Aug 26 2019 10:26:37)
- DLL version V6.50a, compiled Aug 26 2019 10:26:25
- J-Link Commander will now exit on Error
- J-Link Command File read successfully.
- Processing script file...
- J-Link connection not established yet but required for command.
- Connecting to J-Link via USB...O.K.
- Firmware: J-Link V10 compiled Aug 12 2019 10:37:43
- Hardware version: V10.10
- S/N: 50101333
- License(s): GDB
- VTref=3.277V
- Device "M2351KIAAE" selected.
- Connecting to target via SWD
- Found SW-DP with ID 0x0BF11477
- Scanning AP map to find all available APs
- AP[1]: Stopped AP scan as end of AP map has been reached
- AP[0]: AHB-AP (IDR: 0x04770025)
- Iterating through AP map to find AHB-AP to use
- AP[0]: Core found
- AP[0]: AHB-AP ROM base: 0xE00FE000
- CPUID register: 0x411CD200. Implementer code: 0x41 (ARM)
- Found Cortex-M23 r1p0, Little endian.
- FPUnit: 4 code (BP) slots and 0 literal slots
- Security extension: implemented
- Secure debug: enabled
- CoreSight components:
- ROMTbl[0] @ E00FE000
- ROMTbl[0][0]: E00FF000, CID: B105100D, PID: 000BB4CB ROM Table
- ROMTbl[1] @ E00FF000
- ROMTbl[1][0]: E000E000, CID: B105900D, PID: 000BBD20 Cortex-M23
- ROMTbl[1][1]: E0001000, CID: B105900D, PID: 000BBD20 DWT
- ROMTbl[1][2]: E0002000, CID: B105900D, PID: 000BBD20 FPB
- ROMTbl[1][5]: E0041000, CID: B105900D, PID: 001BBD20 Cortex-M23
- ROMTbl[0][1]: E0040000, CID: B105900D, PID: 000BBD20 Cortex-M23
- Cortex-M23 identified.
- PC = 3000C002, CycleCnt = 00000000
- R0 = 00000000, R1 = 3000C000, R2 = 3000C000, R3 = 3000C000
- R4 = 3000C000, R5 = 3000C000, R6 = 3000C000, R7 = 3000C000
- R8 = 3000C000, R9 = 3000C000, R10= 3000C000, R11= 3000C000
- R12= 3000C000
- SP(R13)= 3000C200, MSP= 3000C200, PSP= FFFFFFFC, R14(LR) = FEFFFFFF
- XPSR = 31000000: APSR = nzCVq, EPSR = 01000000, IPSR = 000 (NoException)
- CFBP = 00000000, CONTROL = 00, FAULTMASK = 00, BASEPRI = 00, PRIMASK = 00
- Security extension regs:
- MSP_S = 20001660, MSPLIM_S = 00000000
- PSP_S = FFFFFFFC, PSPLIM_S = 00000000
- MSP_NS = 3000C200, MSPLIM_NS = 00000000
- PSP_NS = FFFFFFFC, PSPLIM_NS = 00000000
- CONTROL_S = 00, FAULTMASK_S = 00, BASEPRI_S = 00, PRIMASK_S = 00
- CONTROL_NS = 00, FAULTMASK_NS = 00, BASEPRI_NS = 00, PRIMASK_NS = 00
- FPU regs: FPU not enabled / not implemented on connected CPU.
- Reset delay: 0 ms
- Reset type NORMAL: Resets core & peripherals via SYSRESETREQ & VECTRESET bit.
- Reset: Halt core after reset via DEMCR.VC_CORERESET.
- Reset: Reset device via AIRCR.SYSRESETREQ.
- PC = 0000116C, CycleCnt = 00000000
- R0 = FFFFFFFF, R1 = FFFFFFFF, R2 = FFFFFFFF, R3 = FFFFFFFF
- R4 = FFFFFFFF, R5 = FFFFFFFF, R6 = FFFFFFFF, R7 = FFFFFFFF
- R8 = FFFFFFFF, R9 = FFFFFFFF, R10= FFFFFFFF, R11= FFFFFFFF
- R12= FFFFFFFF
- SP(R13)= 20001698, MSP= 20001698, PSP= FFFFFFFC, R14(LR) = FFFFFFFF
- XPSR = 01000000: APSR = nzcvq, EPSR = 01000000, IPSR = 000 (NoException)
- CFBP = 00000000, CONTROL = 00, FAULTMASK = 00, BASEPRI = 00, PRIMASK = 00
- Security extension regs:
- MSP_S = 20001698, MSPLIM_S = 00000000
- PSP_S = FFFFFFFC, PSPLIM_S = 00000000
- MSP_NS = FFFFFFFC, MSPLIM_NS = 00000000
- PSP_NS = FFFFFFFC, PSPLIM_NS = 00000000
- CONTROL_S = 00, FAULTMASK_S = 00, BASEPRI_S = 00, PRIMASK_S = 00
- CONTROL_NS = 00, FAULTMASK_NS = 00, BASEPRI_NS = 00, PRIMASK_NS = 00
- FPU regs: FPU not enabled / not implemented on connected CPU.
- Downloading file [secure/secure.hex]...
- Comparing flash [100%] Done.
- Erasing flash [100%] Done.
- Programming flash [100%] Done.
- Verifying flash [100%] Done.
- J-Link: Flash download: Bank 0 @ 0x00000000: 1 range affected (10240 bytes)
- J-Link: Flash download: Total time needed: 0.990s (Prepare: 0.003s, Compare: 0.397s, Erase: 0.466s, Program: 0.081s, Verify: 0.039s, Restore: 0.002s)
- O.K.
- Downloading file [nonsecure/nonsecure.hex]...
- Writing target memory failed.
- Script processing completed.