[ABANDONED] Need output in Verilog format

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  • [ABANDONED] Need output in Verilog format

    Have Segger Embedded Studio. Have SEGGER's objcopy.
    Windows10 environment. Need to create binary with Embedded Studio and/or objcopy,
    and binary must be in Verilog-format. Do not have Keil's fromelf-tool. How to do ?
  • Hello,

    Thank you for your inquiry.
    Could you elaborate what exactly you are trying to do?
    We do not provide any Keil tools as Keil is a different company.

    If you are looking to do some pre or post compile/build steps you can do so in Embedded Studio project settings where you can e.g. call external CL applications which will then be executed at the hook points that you have set in your project.

    Best regards,
    Nino
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
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