[ABANDONED] SAMA5 ETB trace

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  • [ABANDONED] SAMA5 ETB trace

    I've tried the ATSAMA5D2 trace example from the tested devices link shown above, without success. I have a J-Link Base as well as a J-Link Ultra+. The documentation specifies J-Link Pro so perhaps someone can confirm that neither of my units will perform the trace function?

    Thanks
  • Hello,

    I moved the inquiry to a new thread as this question is not related to the other.
    Both J-Links support ETB trace on the SAMA5 target device.
    Do you get any error message? Which version of Ozone are you using?
    Do you get any error messages?

    Best regards,
    NIno
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  • Trying to run the example in Embedded Studio (release 4.18) results in an error message: Failed to download application. Generic error. Please check J-Link and target connection.

    Ozone is V2.62f. When I select "Start Debugging" "Download and Reset Program" I get the following in the console window. (Thanks.)

    (BTW I used jlink.exe to connect to the XPlained board and it seems to be OK.)

    Debug.Stop();
    J-Link: disconnected from target device
    Debug.SetConnectMode (CM_DOWNLOAD_RESET);
    Debug.Start();
    Device "ATSAMA5D27" selected.
    ConfigTargetSettings() start
    ---Setting ETB available---
    ---Setting ETB Base Address---
    ---Setting ETM Base Address---
    ConfigTargetSettings() end
    TotalIRLen = 4, IRPrint = 0x01
    JTAG chain detection found 1 devices:
    #0 Id: 0x5BA00477, IRLen: 04, CoreSight JTAG-DP
    Scanning AP map to find all available APs
    AP[1]: Stopped AP scan as end of AP map has been reached
    AP[0]: APB-AP (IDR: 0x44770002)
    Iterating through AP map to find APB-AP to use
    AP[0]: APB-AP found
    ROMTbl[0][0]: CompAddr: 80020000 CID: B105100D, PID:04-000BB4A5 ROM Table
    ROMTbl[1][0]: CompAddr: 80030000 CID: B105900D, PID:04-001BBC05 Cortex-A5
    Found Cortex-A5 r0p1
    3 code breakpoints, 2 data breakpoints
    Debug architecture ARMv7.0
    Data endian: little
    Main ID register: 0x410FC051
    I-Cache L1: 32 KB, 512 Sets, 32 Bytes/Line, 2-Way
    D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way
    System control register:
    Instruction endian: little
    Level-1 instruction cache enabled
    Level-1 data cache disabled
    MMU disabled
    Branch prediction enabled
    Using stop mode for background memory accesses: wiki.segger.com/Memory_accesses
    J-Link: connected to target device
    ResetTarget() start
    J-Link script: Reset
    J-Link script: Core did not halt after reset. Halting core...
    J-Link script: Done
    ResetTarget() end
    CPU could not be halted
    Can not read register 26 (R13_SVC) while CPU is running
    Can not read register 9 (R15 (PC)) while CPU is running
    Memory access: CPU temp. halted: wiki.segger.com/Memory_accesses#Stop_mode
    Can not read register 26 (R13_SVC) while CPU is running
    Can not read register 9 (R15 (PC)) while CPU is running
    Can not read register 26 (R13_SVC) while CPU is running
    Can not read register 9 (R15 (PC)) while CPU is running
    Executed J-Link command "SelectTraceSource=0"
    Can not read register 0 (R0) while CPU is running
    Can not read register 1 (R1) while CPU is running
    Can not read register 2 (R2) while CPU is running
    Can not read register 3 (R3) while CPU is running
    Can not read register 4 (R4) while CPU is running
    Can not read register 5 (R5) while CPU is running
    Can not read register 6 (R6) while CPU is running
    Can not read register 7 (R7) while CPU is running
    Can not read register 10 (R8_USR) while CPU is running
    Can not read register 11 (R9_USR) while CPU is running
    Can not read register 12 (R10_USR) while CPU is running
    Can not read register 13 (R11_USR) while CPU is running
    Can not read register 14 (R12_USR) while CPU is running
    Can not read register 26 (R13_SVC) while CPU is running
    Can not read register 27 (R14_SVC) while CPU is running
    Can not read register 9 (R15 (PC)) while CPU is running
    Can not read register 8 (CPSR) while CPU is running
    Can not read register 25 (SPSR_SVC) while CPU is running
    Can not read register 38 (FPSCR) while CPU is
    CPU is not halted
  • Hello,

    We tried to reproduce the issue with a SAMA5D2 XPlained Ultra but everything was working as expected with Embedded Studio and Ozone.
    Are you using the same board? If not which one?
    If you are using the same board, did you convert the EDBG to J-Link or did you leave it as EDBG?

    Best regards,
    Nino
    Please read the forum rules before posting: Forum Rules

    Keep in mind, this is not a support forum. Its main purpose is user to user interaction.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support contact us per e-mail.
    Alternatively our support system can be used as well: segger.com/ticket/