Hi all,
We created a CM33-based FPGA platform and used Keil uVision as the IDE to debug and develop our applicatons.
During debugging, we found that J-Link couldn't reset CM33 by pressing the "RESET" button on the IDE after in non-secure state.
However, ULinkpro and ULink2 worked well to reset CM33 correctly in the same condition.
The commands executed by "Reset" button are shown below for reference:
RESET
* JLink Info: Reset: Halt core after reset via DEMCR.VC_CORERESET.
* JLink Info: Reset: Reset device via AIRCR.SYSRESETREQ.
**JLink Warning: T-bit of XPSR is 0 but should be 1. Changed to 1.
MTB_Setup();
LOAD "..\\CM33_ns\\Objects\\CM33_ns.axf" incremental
LOAD "..\\CM33_s\\Objects\\CM33_s.axf" incremental
PC = _RDWORD(0x18000004);
SP = _RDWORD(0x18000000);
g, \\CM33_s\main_s\main
WS 1, `p_uart
WS 1, `retChr
* JLink Info: Reset: Halt core after reset via DEMCR.VC_CORERESET.
* JLink Info: Reset: Reset device via AIRCR.SYSRESETREQ.
* JLink Info: Reset: CPU may have not been reset (DHCSR.S_RESET_ST never gets set).
* JLink Info: Reset: Using fallback: Reset pin.
* JLink Info: Reset: Halt core after reset via DEMCR.VC_CORERESET.
* JLink Info: Reset: Reset device via reset pin
Any F/W or driver released to resolve the issue, or configurations I'm missing here?
Thanks.
BR,
Jungle
We created a CM33-based FPGA platform and used Keil uVision as the IDE to debug and develop our applicatons.
During debugging, we found that J-Link couldn't reset CM33 by pressing the "RESET" button on the IDE after in non-secure state.
However, ULinkpro and ULink2 worked well to reset CM33 correctly in the same condition.
The commands executed by "Reset" button are shown below for reference:
RESET
* JLink Info: Reset: Halt core after reset via DEMCR.VC_CORERESET.
* JLink Info: Reset: Reset device via AIRCR.SYSRESETREQ.
**JLink Warning: T-bit of XPSR is 0 but should be 1. Changed to 1.
MTB_Setup();
LOAD "..\\CM33_ns\\Objects\\CM33_ns.axf" incremental
LOAD "..\\CM33_s\\Objects\\CM33_s.axf" incremental
PC = _RDWORD(0x18000004);
SP = _RDWORD(0x18000000);
g, \\CM33_s\main_s\main
WS 1, `p_uart
WS 1, `retChr
* JLink Info: Reset: Halt core after reset via DEMCR.VC_CORERESET.
* JLink Info: Reset: Reset device via AIRCR.SYSRESETREQ.
* JLink Info: Reset: CPU may have not been reset (DHCSR.S_RESET_ST never gets set).
* JLink Info: Reset: Using fallback: Reset pin.
* JLink Info: Reset: Halt core after reset via DEMCR.VC_CORERESET.
* JLink Info: Reset: Reset device via reset pin
Any F/W or driver released to resolve the issue, or configurations I'm missing here?
Thanks.
BR,
Jungle