[ABANDONED] TI RM57x (Cortex R5F) and RTT Background Mode

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  • [ABANDONED] TI RM57x (Cortex R5F) and RTT Background Mode

    Hi all,

    I was trying to use SystemView with a Texas Instruments RM57 series MCU. I am using the J-Link Base with the latest J-Link software, hardware version 10.10.

    From the SystemView FAQ:
    Can I do continuous recording on Cortex-A or Cortex-R devices?
    It is done via the AHB-AP. If your device has AHB-AP, you can continuously record with SystemView.

    According to the TI document for this product, ti.com/lit/an/spna202/spna202.pdf I see:

    Hercules™ TMS570LC/RM57Lx Safety Microcontrollers Development Insights Using Debug and Trace Tools wrote:

    The DebugAccess Port (DAP) also provides access to memory via AHB-AP and APB-AP via System View and APBView respectively in CCS. Access to runtime memory is done via AHB-AP...

    When I connect to my target in SystemView, I see:
    J-Link>RTT is running in stop mode: wiki.segger.com/RTT#Stop_mode

    And it is clearly running in stop mode - I can tell from the trace where the memory access is occuring - there will be periods of about 100 ms where I see no system tick interrupts.

    When I start JLinkExe, I see an AHB-AP detected.

    Is there something I can do to get Background Mode working for this chip?

    Thanks for the help!

    Here is my JLinkExe output upon connecting:

    Type "connect" to establish a target connection, '?' for help
    J-Link>connect
    Device "RM57L843ZWT" selected.


    Connecting to target via JTAG
    Executing InitTarget()
    TotalIRLen = 6, IRPrint = 0x01
    J-Link script: ICEPick found, enabling Cortex-M3 core.
    TotalIRLen = 6, IRPrint = 0x01
    JTAG chain detection found 1 devices:
    #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick
    TotalIRLen = 10, IRPrint = 0x0011
    JTAG chain detection found 2 devices:
    #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP
    #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick
    Scanning AP map to find all available APs
    AP[3]: Stopped AP scan as end of AP map has been reached
    AP[0]: AHB-AP (IDR: 0x44770001)
    AP[1]: APB-AP (IDR: 0x24770002)
    AP[2]: JTAG-AP (IDR: 0x14760010)
    Iterating through AP map to find APB-AP to use
    AP[0]: Skipped. Not an APB-AP
    AP[1]: APB-AP found
    ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID:04-003BBC15 Cortex-R5
    Found Cortex-R5 r1p2
    8 code breakpoints, 8 data breakpoints
    Debug architecture ARMv7.0
    Data endian: little
    Main ID register: 0x411FC152
    I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way
    D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way
    TCM Type register: 0x00010001
    MPU Type register: 0x00001000
    System control register:
    Instruction endian: little
    Level-1 instruction cache enabled
    Level-1 data cache enabled
    MPU enabled
    Branch prediction enabled
    Executing ResetTarget()
    Memory zones:
    [0]: Default (Default access mode)
    [1]: AHB-AP (AP0) (DMA like acc. in AP0 addr. space)
    [2]: APB-AP (AP1) (DMA like acc. in AP1 addr. space)
    Cortex-R5 identified.
    J-Link>
  • Hello,

    Thank you for your inquiry.
    The following application note should give you all information needed to enable continuous mode on Cortex-R:
    segger.com/downloads/application-notes/AN08005

    Best regards,
    Nino
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  • Hi Nino,

    Thanks for the reply. I had seen this PDF and had setup #define SEGGER_RTT_SECTION (".dma") to put the RTT control block in a non-cached memory segment in internal SRAM. I've also set SEGGER_RTT_ALIGNMENT to 8 in case that should make a difference.

    Section 1.2 of the PDF document specifies that background memory access should be supported if the device appears in the list of supported devices at segger.com/products/debug-prob…s-and-devices/#DeviceList and indeed after clicking "List of known devices" on that page, I see the RM57L843ZWT.

    Could I be missing anything else?
    Thx!