Hello,

i try to create a procedure to unlock an MAC7116 chip using J-Flash. For this i need to boot the chip into extended mode where internal Flash and RAM are disabledm connect to the device, setup clocks and write some commands to the internal CFM controller. The chip does not provide a TRST signal for the TAP, instead the chips /RESET is used. One thing that i found out soon was, that the Segger default using 0 ms delay after init reset command is wrong. It can't connect to the chip because it needs a bit of time to recover from reset. Using 20 ms is just fine. Maybe this is because of the fact Segger doesn't suppose to use TRST as signal, but to reset TAP via JTAG procedure...

For now, when i use "Reset type 0" like in the Segger selection default for this chip, i end up with an error that the RAMcode couldn't be downloaded

Now i wonder how to get around this?
When does J-Flash try to download the RAMcode? Right after any init steps or after Reset?
Is RAMcode always needed? Or does J-Flash support a legacy JTAG only way to communicate whith the chip?

Thanks for fast reply and for pointing out how J-Flash works!
Yes, i want to unlock and reflash the content of the MAC7116.
As for the datasheets the MAC needs a special unlock procedure by sending special commands to the internal Flash controller (CFM) via JTAG. This is done by memory mapped registers. All could be done by writing to registers only, no need to have any RAMcode at place (i think). So i if i add all needed commands into the MCU Init sequence, it should all work, right? But what happens if they are done? Will the J-Flash software try to upload the RAMcode anyway, or is there some Init-Command to prevent this?

And what do you mean by saying "J-Link software provides the Flash loader for the internal Flash of that MCU already." ? Does it mean that if i use J-Link commander it is possible to connect and issue some kind of "unlock" command which do all the work for me?

THX