[SOLVED] can't connect to Syntacore SCR1

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  • [SOLVED] can't connect to Syntacore SCR1

    Hi,
    I'm having issues connecting to a SCR1 core using a brand new J_link pod (hardware V10.1) which I specifically purchases for this task.
    I'm running the lastest beta J-link softwae (v6.45a) as it claims to provide support for the SCR1.
    I'm aware of the 1/12 SCR1 clock constraint and the jtag frequency is set to a sufficiently low clock speed (100kHz).

    This is the output of the connection attempt:


    Connecting to target via JTAG
    ConfigTargetSettings() start
    ConfigTargetSettings() end
    TotalIRLen = 4, IRPrint = 0x01
    JTAG chain detection found 1 devices:
    #0 Id: 0xDEB01001, IRLen: 04, Unknown device
    ConfigTargetSettings() start
    ConfigTargetSettings() end
    TotalIRLen = 4, IRPrint = 0x01
    JTAG chain detection found 1 devices:
    #0 Id: 0xDEB01001, IRLen: 04, Unknown device

    ****** Error: CPU-TAP not found in JTAG chain


    I have no problem connecting to the SCR1 using an Olimex JTAG pod and openOCD. Only the J-link connection doesn't work.
    Does anybody have any idea of what could be the problem?

    Thank you
  • Hello,

    Thank you for your inquiry.
    Generally all cores that follow standard RISC-V RV32 implementation are supported by J-Link.


    dsula wrote:

    I've taken up this issue with Syntacore and according to them J-Link is NOT compatible with SCR1 (as of March 2019).
    The only supported option is to use OpenOCD.
    This is quite a worrisome statement by Syntacore as we specifically implemented support for the SCR1 for them...

    See here for more information with example projects etc.:
    wiki.segger.com/Syntacore_SCR1
    wiki.segger.com/Syntacore_SCR1_SDK_Arty


    Best regards,
    Nino
    Please read the forum rules before posting: Forum Rules

    Keep in mind, this is not a support forum. Its main purpose is user to user interaction.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support contact us per e-mail.
    Alternatively our support system can be used as well: segger.com/ticket/
  • Thank you for your reply.
    I've seen the segger wiki post regarding the SCR1. I also downloaded the SCR1/Arty SDK and tried to use it with the Segger studio. It doesn't work. What does this error message mean?

    ****** Error: CPU-TAP not found in JTAG chain

    Obviously j-link is able to communicate and identify the device. So something deeper down must be not as expected.

    Anyways. Syntacore apparently is working on the issue and they promised me early access to a fix. We'll see...
  • The new version of SCR1 is now online. It claims to support the debug spec version 0.13.
    Unfortunately the problem persists. J-link cannot connect to the SCR1 with the error message

    CPU-TAP not found.

    Connection with cheap Olimex OpenOCD works without a problem.

    Did ANYBODY ever tried this with j-link and gotten it to work?
  • Hello,

    The implementation was tested with the FPGA image provided by Syntacore back then.
    That one had TAP ID: 0xDEB13001
    However they seem to have changed this to 0xDEB01001 without informing us.
    Anyhow we have fixed this and added both IDs to be valid for SCR1.
    This fix will be made available with the next J-Link software release planned this week.
    The fix was successfully tested with both IDs.

    Best regards,
    Nino
    Please read the forum rules before posting: Forum Rules

    Keep in mind, this is not a support forum. Its main purpose is user to user interaction.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support contact us per e-mail.
    Alternatively our support system can be used as well: segger.com/ticket/
  • Hi Nino,

    CAREFUL. The latest update (March 2019) of their SCR1 core changed the ID to DEB11001. DEB01001 is the previous ID they used before that.
    Also note that the IR length changed from 4 to 5 in the latest release.

    See below for an excerpt of the j-link connect.
    Cheers
    Daniel

    Device "RISC-V" selected.
    Connecting to target via JTAG
    ConfigTargetSettings() start
    ConfigTargetSettings() end
    TotalIRLen = 5, IRPrint = 0x01
    JTAG chain detection found 1 devices:
    #0 Id: 0xDEB11001, IRLen: 05, Unknown device

    ****** Error: CPU-TAP not found in JTAG chain
  • Hi Daniel,

    Sorry this was a typo by me.
    I meant it was changed from 0xDEB13001 to 0xDEB11001.
    Anyhow we are in contact with Syntacore making sure that ID detection is more sturdy in future so we see no such surprises anymore.

    Best regards,
    Nino
    Please read the forum rules before posting: Forum Rules

    Keep in mind, this is not a support forum. Its main purpose is user to user interaction.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support contact us per e-mail.
    Alternatively our support system can be used as well: segger.com/ticket/
  • New

    Hello,

    Good to hear that you are up and running again.
    We will consider this thread as solved now.

    Best regards,
    Nino
    Please read the forum rules before posting: Forum Rules

    Keep in mind, this is not a support forum. Its main purpose is user to user interaction.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support contact us per e-mail.
    Alternatively our support system can be used as well: segger.com/ticket/