[SOLVED] Can J-Link BASE connect to Rockchip RK3288 ?

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  • [SOLVED] Can J-Link BASE connect to Rockchip RK3288 ?

    Hello,

    I'd like to connect to Rockchip RK3288 via J-Link BASE on Firefly RK3288 board, is it possible?
    I saw J-Link support Cortex-A17 (after firmware v9.1), and my hardware verion is v9.4

    Here is my JLinkGDBServer message in Ubuntu 16.04

    Shell-Script

    1. JLinkGDBServer -select USB -device Cortex-A17 -if JTAG -speed auto -noreset -noir
    2. SEGGER J-Link GDB Server V6.22g Command Line Version
    3. JLinkARM.dll V6.22g (DLL compiled Jan 17 2018 16:40:32)
    4. Command line: -select USB -device Cortex-A17 -if JTAG -speed auto -noreset -noir
    5. -----GDB Server start settings-----
    6. GDBInit file: none
    7. GDB Server Listening port: 2331
    8. SWO raw output listening port: 2332
    9. Terminal I/O port: 2333
    10. Accept remote connection: yes
    11. Generate logfile: off
    12. Verify download: off
    13. Init regs on start: off
    14. Silent mode: off
    15. Single run mode: off
    16. Target connection timeout: 0 ms
    17. ------J-Link related settings------
    18. J-Link Host interface: USB
    19. J-Link script: none
    20. J-Link settings file: none
    21. ------Target related settings------
    22. Target device: Cortex-A17
    23. Target interface: JTAG
    24. Target interface speed: auto
    25. Target endian: little
    26. Connecting to J-Link...
    27. J-Link is connected.
    28. Firmware: J-Link V9 compiled Jan 11 2018 11:06:30
    29. Hardware: V9.40
    30. S/N: 59409020
    31. Feature(s): RDI, GDB, FlashDL, FlashBP, JFlash
    32. Checking target voltage...
    33. Connecting to target failed. Connected correctly?
    34. GDB Server will be closed...
    35. Shutting down...
    36. Could not connect to target.
    37. Please check power, connection and settings.
    Display All


    And Here is my JLinkExe message in Ubuntu 16.04

    Shell-Script

    1. $ ./JLinkExe
    2. SEGGER J-Link Commander V6.12j (Compiled Feb 15 2017 18:03:38)
    3. DLL version V6.12j, compiled Feb 15 2017 18:03:30
    4. Connecting to J-Link via USB...O.K.
    5. Firmware: J-Link V9 compiled Jan 11 2018 11:06:30
    6. Hardware version: V9.40
    7. S/N: 59409020
    8. License(s): RDI, GDB, FlashDL, FlashBP, JFlash
    9. VTref = 3.320V
    10. Type "connect" to establish a target connection, '?' for help
    11. J-Link>connect
    12. Please specify device / core. <Default>: CORTEX-A17
    13. Type '?' for selection dialog
    14. Device>
    15. Please specify target interface:
    16. J) JTAG (Default)
    17. S) SWD
    18. TIF>
    19. Device position in JTAG chain (IRPre,DRPre) <Default>: -1,-1 => Auto-detect
    20. JTAGConf>
    21. Specify target interface speed [kHz]. <Default>: 4000 kHz
    22. Speed>
    23. Device "CORTEX-A17" selected.
    24. TotalIRLen = 4, IRPrint = 0x01
    25. ARM AP[0]: 0x44770002, APB-AP
    26. ROMTbl 0 [0]: 00020003, CID: B105100D, PID:04-001BB4AD ROM Table
    27. ROMTbl 1 [0]: 00010003, CID: B105900D, PID:04-001BBC0D
    28. ROMTbl 1 [1]: 00011003, CID: B105900D, PID:04-001BB9AD
    29. ROMTbl 1 [2]: 00012003, CID: B105900D, PID:04-001BBC0D
    30. ROMTbl 1 [3]: 00013003, CID: B105900D, PID:04-001BB9AD
    31. ROMTbl 1 [4]: 00014003, CID: B105900D, PID:04-001BBC0D
    32. ROMTbl 1 [5]: 00015003, CID: B105900D, PID:04-001BB9AD
    33. ROMTbl 1 [6]: 00016003, CID: B105900D, PID:04-001BBC0D
    34. ROMTbl 1 [7]: 00017003, CID: B105900D, PID:04-001BB9AD
    35. ROMTbl 1 [8]: 00018003, CID: B105900D, PID:04-004BB906 ECT / CTI
    36. ROMTbl 1 [9]: 00019003, CID: B105900D, PID:04-004BB906 ECT / CTI
    37. ROMTbl 1 [10]: 0001A003, CID: B105900D, PID:04-004BB906 ECT / CTI
    38. ROMTbl 1 [11]: 0001B003, CID: B105900D, PID:04-004BB906 ECT / CTI
    39. ROMTbl 1 [12]: 0001C003, CID: B105900D, PID:04-001BB95C
    40. ROMTbl 1 [13]: 0001D003, CID: B105900D, PID:04-001BB95C
    41. ROMTbl 1 [14]: 0001E003, CID: B105900D, PID:04-001BB95C
    42. ROMTbl 1 [15]: 0001F003, CID: B105900D, PID:04-001BB95C
    43. ROMTbl 0 [4]: 00043003, CID: B105900D, PID:04-002BB908 CSTF
    44. ROMTbl 0 [5]: 00044003, CID: B105900D, PID:04-004BB906 ECT / CTI
    45. ROMTbl 0 [6]: 00045003, CID: B105F00D, PID:04-000BB101
    46. ROMTbl 0 [7]: 00046003, CID: B105900D, PID:04-004BB912 TPIU
    47. TotalIRLen = 4, IRPrint = 0x01
    48. ****** Error: Cortex-A/R-JTAG (connect): Could not determine address of core debug registers. Incorrect CoreSight ROM table in device?
    49. TotalIRLen = 4, IRPrint = 0x01
    50. TotalIRLen = 4, IRPrint = 0x01
    51. Cannot connect to target.
    52. J-Link>
    Display All


    I have no idea to fix it,
    thank you.
  • Hello,

    Thank you for your inquiry.
    Generic Cortex-A17 is supported since J-Link Base V9.
    But RK3288 is currently not officially supported:
    segger.com/downloads/supported-devices.php
    It is possible that the RK3288 needs target device specific init before you can connect.
    You can customize connect sequences using a JLinkScript. More information can be found in the J-Link user manual UM08001.
    For information about how to connect to the RK3288 we recommend consulting with Rockchip.

    Best regards,
    Nino
    Please read the forum rules before posting: Forum Rules

    Keep in mind, this is not a support forum. Its main purpose is user to user interaction.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.
  • Hello Nino,

    Thanks for your reply.
    I contacted Rockchip SoC vendor and get more information about DAP (Debug Access Port).
    And modified JLinkScript through J-Link user manual UM08001. Here is my JLinkScript for RK3288

    Source Code

    1. void InitTarget(void) {
    2. JLINK_SYS_Report("Hello SEGGER JLINK");
    3. CPU = CORTEX_A17;
    4. /* DAP configuration */
    5. CORESIGHT_CoreBaseAddr = 0xFFBB0000;
    6. /* Manually configure which APs are present on the CoreSight device */
    7. CORESIGHT_AddAP(1, CORESIGHT_AHB_AP);
    8. CORESIGHT_AddAP(0, CORESIGHT_APB_AP);
    9. }
    Display All

    Now I can connect to RK3288 (Coretex-A17) through J-Link Base, firmware V9, thank you very much! :)

    Timmy.
  • Hello Timmy,

    Thank you for your feedback.
    Good to hear that you are up and running again.
    Also thank you for providing the JLinkScript. This will surely be useful for other community members looking into the same target device as you.

    Best regards,
    Nino
    Please read the forum rules before posting: Forum Rules

    Keep in mind, this is not a support forum. Its main purpose is user to user interaction.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.