[SOLVED] stm32 kept in reset forever

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  • [SOLVED] stm32 kept in reset forever

    hi,

    I have a firmware which works on stm32f103c6 .
    We had to replace the controller with an other to get more space for the flash Rom and that was the stm32f103cbt6,they are the same familiy and have the same datasheet and everything is the same .
    when i try to flash it (using Jtrace Pro) i get first a messaeg that active write protected stm32 device detected and asks me if i want to perform an unlock . I click yes and i get error "could not stop cortex-M device please check the jtag cable.
    i have already tried :
    - unlock kinetis in jlink commander but i got "Timout while unlocking device" (screenshot below)
    - reset the option bytes to factory settings but it stucks without any feedback (screenshot below)
    everything was ok with the old STM we just replaced it with new one ,nothing has changed !!
    Thanx alot for any help
    the Build Output :
    JLink info:
    ------------
    DLL: V6.32h, compiled Jul 5 2018 18:11:19
    Firmware: J-Trace PRO V1 Cortex-M compiled Apr 20 2018 16:47:45
    Hardware: V1.00
    S/N : 751000130
    Feature(s) : RDI, FlashBP, FlashDL, JFlash, GDB
    * JLink Info: Found SW-DP with ID 0x1BA01477
    * JLink Info: Device will be unsecured now.
    * JLink Info: Found SW-DP with ID 0x1BA01477
    * JLink Info: Scanning AP map to find all available APs
    * JLink Info: AP[1]: Stopped AP scan as end of AP map has been reached
    * JLink Info: AP[0]: AHB-AP (IDR: 0x14770011)
    * JLink Info: Iterating through AP map to find AHB-AP to use
    * JLink Info: AP[0]: Core found
    * JLink Info: AP[0]: AHB-AP ROM base: 0xE00FF000
    * JLink Info: CPUID register: 0x411FC231. Implementer code: 0x41 (ARM)
    * JLink Info: Found Cortex-M3 r1p1, Little endian.
    * JLink Info: FPUnit: 6 code (BP) slots and 2 literal slots
    * JLink Info: CoreSight components:
    * JLink Info: ROMTbl[0] @ E00FF000
    * JLink Info: ROMTbl[0][0]: E000E000, CID: B105E00D, PID: 001BB000 SCS
    * JLink Info: ROMTbl[0][1]: E0001000, CID: B105E00D, PID: 001BB002 DWT
    * JLink Info: ROMTbl[0][2]: E0002000, CID: B105E00D, PID: 000BB003 FPB
    * JLink Info: ROMTbl[0][3]: E0000000, CID: B105E00D, PID: 001BB001 ITM
    * JLink Info: ROMTbl[0][4]: E0040000, CID: B105900D, PID: 001BB923 TPIU-Lite
    ROMTableAddr = 0xE00FF000
    * JLink Info: Reset: Halt core after reset via DEMCR.VC_CORERESET.
    * JLink Info: Reset: Reset device via AIRCR.SYSRESETREQ.
    * JLink Info: Reset: S_RESET_ST never gets cleared. CPU seems to be kept in reset forever.
    * JLink Info: Reset: Using fallback: Reset pin.
    * JLink Info: Reset: Halt core after reset via DEMCR.VC_CORERESET.
    * JLink Info: Reset: Reset device via reset pin
    * JLink Info: Reset: VC_CORERESET did not halt CPU. (Debug logic also reset by reset pin?).
    * JLink Info: Reset: Reconnecting and manually halting CPU.
    * JLink Info: Found SW-DP with ID 0x1BA01477
    * JLink Info: AP map detection skipped. Manually configured AP map found.
    * JLink Info: AP[0]: AHB-AP (IDR: Not set)
    * JLink Info: AP[0]: Core found
    * JLink Info: AP[0]: AHB-AP ROM base: 0xE00FF000
    * JLink Info: CPUID register: 0x411FC231. Implementer code: 0x41 (ARM)
    * JLink Info: Found Cortex-M3 r1p1, Little endian.
    **JLink Warning: CPU could not be halted
    * JLink Info: Reset: Core did not halt after reset, trying to disable WDT.
    * JLink Info: Reset: Halt core after reset via DEMCR.VC_CORERESET.
    * JLink Info: Reset: Reset device via reset pin
    * JLink Info: Reset: VC_CORERESET did not halt CPU. (Debug logic also reset by reset pin?).
    * JLink Info: Reset: Reconnecting and manually halting CPU.
    * JLink Info: Found SW-DP with ID 0x1BA01477
    * JLink Info: AP map detection skipped. Manually configured AP map found.
    * JLink Info: AP[0]: AHB-AP (IDR: Not set)
    * JLink Info: AP[0]: Core found
    * JLink Info: AP[0]: AHB-AP ROM base: 0xE00FF000
    * JLink Info: CPUID register: 0x411FC231. Implementer code: 0x41 (ARM)
    * JLink Info: Found Cortex-M3 r1p1, Little endian.
    **JLink Warning: CPU could not be halted
    * JLink Info: Reset: Failed. Toggling reset pin and trying reset strategy again.
    * JLink Info: Found SW-DP with ID 0x1BA01477
    * JLink Info: AP map detection skipped. Manually configured AP map found.
    * JLink Info: AP[0]: AHB-AP (IDR: Not set)
    * JLink Info: AP[0]: Core found
    * JLink Info: AP[0]: AHB-AP ROM base: 0xE00FF000
    * JLink Info: CPUID register: 0x411FC231. Implementer code: 0x41 (ARM)
    * JLink Info: Found Cortex-M3 r1p1, Little endian.
    * JLink Info: Reset: Halt core after reset via DEMCR.VC_CORERESET.
    * JLink Info: Reset: Reset device via AIRCR.SYSRESETREQ.
    * JLink Info: Reset: S_RESET_ST never gets cleared. CPU seems to be kept in reset forever.
    * JLink Info: Reset: Using fallback: Reset pin.
    * JLink Info: Reset: Halt core after reset via DEMCR.VC_CORERESET.
    * JLink Info: Reset: Reset device via reset pin
    * JLink Info: Reset: VC_CORERESET did not halt CPU. (Debug logic also reset by reset pin?).
    * JLink Info: Reset: Reconnecting and manually halting CPU.
    * JLink Info: Found SW-DP with ID 0x1BA01477
    * JLink Info: AP map detection skipped. Manually configured AP map found.
    * JLink Info: AP[0]: AHB-AP (IDR: Not set)
    * JLink Info: AP[0]: Core found
    * JLink Info: AP[0]: AHB-AP ROM base: 0xE00FF000
    * JLink Info: CPUID register: 0x411FC231. Implementer code: 0x41 (ARM)
    * JLink Info: Found Cortex-M3 r1p1, Little endian.
    **JLink Warning: CPU could not be halted
    * JLink Info: Reset: Core did not halt after reset, trying to disable WDT.
    * JLink Info: Reset: Halt core after reset via DEMCR.VC_CORERESET.
    * JLink Info: Reset: Reset device via reset pin
    * JLink Info: Reset: VC_CORERESET did not halt CPU. (Debug logic also reset by reset pin?).
    * JLink Info: Reset: Reconnecting and manually halting CPU.
    * JLink Info: Found SW-DP with ID 0x1BA01477
    * JLink Info: AP map detection skipped. Manually configured AP map found.
    * JLink Info: AP[0]: AHB-AP (IDR: Not set)
    * JLink Info: AP[0]: Core found
    * JLink Info: AP[0]: AHB-AP ROM base: 0xE00FF000
    * JLink Info: CPUID register: 0x411FC231. Implementer code: 0x41 (ARM)
    * JLink Info: Found Cortex-M3 r1p1, Little endian.
    **JLink Warning: CPU could not be halted
    **JLink Warning: CPU could not be halted
    Error: Flash Download failed - Target DLL has been cancelled
    Flash Load finished at 08:20:20
    Images
    • reset to factory settings.PNG

      16.15 kB, 645×303, viewed 15 times
    • timout while unlocking device.PNG

      20.34 kB, 652×303, viewed 12 times
  • Hello,

    Thank you for your inquiry.
    From the Commander session it seems like the unlock notification is supressed.
    Try to clear it: wiki.segger.com/Secured_ST_device_detected
    After that try a connect with J-Link Commander. Could you provide a screenshot of the complete session?
    wiki.segger.com/J-Link_cannot_…ty_using_J-Link_Commander


    Affash wrote:

    - unlock kinetis in jlink commander but i got "Timout while unlocking device" (screenshot below)
    unlock kinetis is meant to be used by NXP Kinetis devices, not ST target devices. Please do not use this command on any ST devices, as this could lead to unpredictable behaviour.

    Affash wrote:

    eset the option bytes to factory settings but it stucks without any feedback (screenshot below)
    everything was ok with the old STM we just replaced it with new one ,nothing has changed !!
    This should not new necessary if you never changed the opt bytes on your new target devices.
    Did you program the opt bytes at some point?

    How are you flashing your application?
    Could you provide a J-Link log of a Flashing session?
    wiki.segger.com/Enable_J-Link_log_file

    Best regards,
    Nino
    Please read the forum rules before posting: Forum Rules

    Keep in mind, this is not a support forum. Its main purpose is user to user interaction.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support contact us per e-mail.
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  • Hello Affash,

    Great to hear that you are up and running again.
    This thread will be closed now.

    Best regards,
    Nino
    Please read the forum rules before posting: Forum Rules

    Keep in mind, this is not a support forum. Its main purpose is user to user interaction.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support contact us per e-mail.
    Alternatively our support ticketing system can be used as well: segger.com/ticket/