Cannot connect, need a hint on what the errors tell me

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    • Cannot connect, need a hint on what the errors tell me

      Hello everyone,

      I have a hardware prototype with an ATMEL ATSAMV71Q21 that has ... gone through rough times (short circuit between core and IO voltage), meaning the device may have taken physical damage.
      The board errors were fixed at this point, voltages, current draw and chip temperature are fine by now. I tried to connect to the Device using a JLINK and run into the following results:

      SWD:

      Display Spoiler
      Device "ATSAMV71Q21" selected.


      Connecting to target via SWD
      Found SW-DP with ID 0x0BD11477
      Scanning AP map to find all available APs
      AP[0]: Stopped AP scan as end of AP map seems to be reached
      Iterating through AP map to find AHB-AP to use
      Found SW-DP with ID 0x0BD11477
      Scanning AP map to find all available APs
      AP[0]: Stopped AP scan as end of AP map seems to be reached
      Iterating through AP map to find AHB-AP to use

      ****** Error: Could not find core in Coresight setup
      Found SW-DP with ID 0x0BD11477
      Scanning AP map to find all available APs
      AP[0]: Stopped AP scan as end of AP map seems to be reached
      Iterating through AP map to find AHB-AP to use
      Found SW-DP with ID 0x0BD11477
      Scanning AP map to find all available APs
      AP[0]: Stopped AP scan as end of AP map seems to be reached
      Iterating through AP map to find AHB-AP to use
      Cannot connect to target.


      JTAG

      Display Spoiler
      Device "ATSAMV71Q21" selected.


      Connecting to target via JTAG
      TotalIRLen = ?, IRPrint = 0x..000000000000000000000000
      TotalIRLen = ?, IRPrint = 0x..000000000000000000000000
      TotalIRLen = ?, IRPrint = 0x..000000000000000000000000
      TotalIRLen = ?, IRPrint = 0x..000000000000000000000000
      Cannot connect to target.


      The JLINK seems to find something (SW-DP with 2 IDs ... are those part of the ATSAM?).
      Does this imply that the device is (not) damaged or does this not help on determining the ICs state?
      Assuming the chip is OK, what would the results tell me?

      Thank you very much,
      Lars
    • Hello Lars,

      Thank you for your inquiry.
      It seems that J-Link can't access the device properly.
      Attached is a working SWD connection to a SAMV71 XPlained Ultra eval board. Unfortunately it does not have JTAG so I could not test that.
      Do you have such an eval board? We recommend using it as reference and compare the signal quality from J-Link to target device.
      To make sure the J-Link has not been damaged does connection work to another target device with J-Link?
      Could you provide a J-Link log of a failed session?

      wiki.segger.com/Enable_J-Link_log_file

      Best regards,
      Nino
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