[SOLVED] JLINK flash breakpoints in QUAD SPI for iMX7 Sabre dev board

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  • [SOLVED] JLINK flash breakpoints in QUAD SPI for iMX7 Sabre dev board

    Hello Nino - sorry to start another thread, the last thread was marked as closed before I had a chance to respond to your last inquiry. I am currently running J-LINK v6.34h family of tools. I am using Elipse as my IDE and have had success with RAM-based applications, but still no luck on QUAD SPI based applications running on the M4 core of the iMX7D.

    For my current debugging I am stopping the A-core in UBOOT and running the "sf probe" command with essentially sets up the QUAD-SPI interface allowing access. When I go to debug a QUAD-SPI application I see the console report that it is downloading the code and verifying it (all OK with one exception at one particular address), but I am not convinced that this 'downloading' is actually doing anything. I also still get "WARNING: No more breakpoint resources left". There is a dump of the console upon starting the debug session below.

    I did try using J-FLASH but the memory part is not in the supported list (Maybe it's not supported at all?). Our Sabre SD board has a Macronix MX25L51245GXDI-10G, 64M-byte part on it. I tried using some similar parts and manually setting up a part but have had no luck; I can connect to the board just fine, but the memory part is not recognized. The base address of the SPI bus is 0x60000000.

    Source Code

    1. SEGGER J-Link GDB Server V6.34h Command Line Version
    3. JLinkARM.dll V6.34h (DLL compiled Oct 9 2018 15:48:11)
    5. Command line: -if jtag -device CORTEX-M4 -endian little -speed 1000 -port 2331 -swoport 2332 -telnetport 19021 -vd -ir -localhostonly 1 -singlerun -strict -timeout 0 -nogui -scriptfile C:\Program Files (x86)\SEGGER\JLINK_Scripts\NXP_iMX7D_Connect_CortexM4.JLinkScript
    6. -----GDB Server start settings-----
    7. GDBInit file: none
    8. GDB Server Listening port: 2331
    9. SWO raw output listening port: 2332
    10. Terminal I/O port: 19021
    11. Accept remote connection: localhost only
    12. Generate logfile: off
    13. Verify download: on
    14. Init regs on start: on
    15. Silent mode: off
    16. Single run mode: on
    17. Target connection timeout: 0 ms
    18. ------J-Link related settings------
    19. J-Link Host interface: USB
    20. J-Link script: C:\Program Files (x86)\SEGGER\JLINK_Scripts\NXP_iMX7D_Connect_CortexM4.JLinkScript
    21. J-Link settings file: none
    22. ------Target related settings------
    23. Target device: CORTEX-M4
    24. Target interface: JTAG
    25. Target interface speed: 1000kHz
    26. Target endian: little
    28. Connecting to J-Link...
    29. J-Link is connected.
    30. Firmware: J-Link V10 compiled Sep 4 2018 11:24:21
    31. Hardware: V10.10
    32. S/N: 50101423
    33. Feature(s): GDB
    34. Checking target voltage...
    35. Target voltage: 3.30 V
    36. Listening on TCP/IP port 2331
    37. Connecting to target...
    38. J-Link found 1 JTAG device, Total IRLen = 4
    39. JTAG ID: 0x5BA00477 (Cortex-M4)
    40. WARNING: T-bit of XPSR is 0 but should be 1. Changed to 1.
    41. Connected to target
    42. Waiting for GDB connection...Connected to 127.0.0.1
    43. Reading all registers
    44. Read 4 bytes @ address 0x00000000 (Data = 0x1FFFFEFF)
    45. Read 2 bytes @ address 0x00000000 (Data = 0xFEFF)
    46. Received monitor command: speed 1000
    47. Target interface speed set to 1000 kHz
    48. Received monitor command: clrbp
    49. Received monitor command: reset 1
    50. WARNING: T-bit of XPSR is 0 but should be 1. Changed to 1.
    51. Resets the core only, not peripherals.
    52. Received monitor command: halt
    53. Halting target CPU...
    54. ...Target halted (PC = 0x6010AC9C)
    55. Received monitor command: regs
    56. R0 = 00000000, R1 = 00000000, R2 = 00000000, R3 = 00000000
    57. R4 = 00000000, R5 = 00000000, R6 = 00000000, R7 = 00000000
    58. R8 = 00000000, R9 = 00000000, R10= 00000000, R11= 00000000
    59. R12= 00000000, R13= 1FFFFEFC, MSP= 1FFFFEFC, PSP= 00000000
    60. R14(LR) = FFFFFFFF, R15(PC) = 6010AC9C
    61. XPSR 01000000, APSR 00000000, EPSR 01000000, IPSR 00000000
    62. CFBP 00000000, CONTROL 00, FAULTMASK 00, BASEPRI 00, PRIMASK 00
    63. Reading all registers
    64. Read 4 bytes @ address 0x6010AC9C (Data = 0x49144813)
    65. Read 2 bytes @ address 0x6010AC9C (Data = 0x4813)
    66. Received monitor command: speed auto
    67. Select auto target interface speed (4000 kHz)
    68. Received monitor command: flash breakpoints 1
    69. Flash breakpoints enabled
    70. Received monitor command: semihosting enable
    71. Semi-hosting enabled (Handle on BKPT)
    72. Received monitor command: semihosting IOClient 2
    73. Semihosting I/O set to GDB Client
    74. Read 4 bytes @ address 0x6010AC9C (Data = 0x49144813)
    75. Read 2 bytes @ address 0x6010AC9C (Data = 0x4813)
    76. Downloading 1024 bytes @ address 0x60100000 - Verified OK
    77. Downloading 16128 bytes @ address 0x60100400 - Verified OK
    78. Downloading 16048 bytes @ address 0x60104300 - Verified OK
    79. Downloading 16000 bytes @ address 0x601081B0 - Verified OK
    80. Downloading 16000 bytes @ address 0x6010C030 - Verified OK
    81. Downloading 16016 bytes @ address 0x6010FEB0 - Verified OK
    82. Downloading 15984 bytes @ address 0x60113D40 - Verified OK
    83. Downloading 16032 bytes @ address 0x60117BB0 - Verified OK
    84. Downloading 16016 bytes @ address 0x6011BA50 - Verified OK
    85. Downloading 16048 bytes @ address 0x6011F8E0 - Verify failed
    86. Downloading 16320 bytes @ address 0x60123790 - Verified OK
    87. Downloading 16240 bytes @ address 0x60127750 - Verified OK
    88. Downloading 4544 bytes @ address 0x6012B6C0 - Verified OK
    89. Downloading 8 bytes @ address 0x6012C880 - Verified OK
    90. Downloading 4064 bytes @ address 0x6012C888 - Verified OK
    91. Read 4 bytes @ address 0x6010AC9C (Data = 0x49144813)
    92. Read 2 bytes @ address 0x6010AC9C (Data = 0x4813)
    93. Read 2 bytes @ address 0x6010467A (Data = 0x4802)
    94. Read 4 bytes @ address 0x60104684 (Data = 0x60127208)
    95. Read 2 bytes @ address 0x6010467A (Data = 0x4802)
    96. Read 4 bytes @ address 0x60104684 (Data = 0x60127208)
    97. Read 2 bytes @ address 0x6010467A (Data = 0x4802)
    98. Read 2 bytes @ address 0x60104C90 (Data = 0x4B12)
    99. Read 4 bytes @ address 0x60104CDC (Data = 0x009204B8)
    100. Read 2 bytes @ address 0x60104CDA (Data = 0x4770)
    101. Read 2 bytes @ address 0x6010284C (Data = 0x4D8A)
    102. Read 4 bytes @ address 0x60102A78 (Data = 0x00920418)
    103. Read 2 bytes @ address 0x6010284E (Data = 0x4F8B)
    104. Read 2 bytes @ address 0x6010D9D0 (Data = 0x4B11)
    105. Read 4 bytes @ address 0x6010DA18 (Data = 0x009204B8)
    106. Read 2 bytes @ address 0x6010D9D8 (Data = 0x9A01)
    107. Read 2 bytes @ address 0x6010F8B0 (Data = 0x6803)
    108. Read 2 bytes @ address 0x6010F966 (Data = 0x4648)
    109. Read 2 bytes @ address 0x60104C42 (Data = 0xAA08)
    110. Read 2 bytes @ address 0x60104C4C (Data = 0x9205)
    111. Read 2 bytes @ address 0x60102342 (Data = 0x4829)
    112. Read 4 bytes @ address 0x601023E8 (Data = 0x60123434)
    113. Read 2 bytes @ address 0x60102348 (Data = 0x4A28)
    114. Read 2 bytes @ address 0x601031DE (Data = 0x2803)
    115. Read 2 bytes @ address 0x601032BE (Data = 0xF7FF)
    116. Read 2 bytes @ address 0x601049C8 (Data = 0x4B22)
    117. Read 4 bytes @ address 0x60104A54 (Data = 0x009204B8)
    118. Read 2 bytes @ address 0x60104A22 (Data = 0x602C)
    119. Read 2 bytes @ address 0x6010693A (Data = 0x4B22)
    120. Read 4 bytes @ address 0x601069C4 (Data = 0x009204B8)
    121. Read 2 bytes @ address 0x60106974 (Data = 0x4630)
    122. Read 2 bytes @ address 0x6010D8B2 (Data = 0x4604)
    123. Read 2 bytes @ address 0x6010D8B4 (Data = 0x4608)
    124. Read 2 bytes @ address 0x6010F8B0 (Data = 0x6803)
    125. Read 2 bytes @ address 0x6010F8D0 (Data = 0x2F00)
    126. Read 2 bytes @ address 0x60106F50 (Data = 0x4B68)
    127. Read 4 bytes @ address 0x601070F4 (Data = 0x009204B8)
    128. Read 2 bytes @ address 0x60106F4C (Data = 0xE92D)
    129. Read 2 bytes @ address 0x60100878 (Data = 0x2204)
    130. Read 2 bytes @ address 0x60100884 (Data = 0x4B04)
    131. Read 2 bytes @ address 0x6010F8B0 (Data = 0x6803)
    132. Read 2 bytes @ address 0x6010F8B2 (Data = 0xF8D0)
    133. Read 2 bytes @ address 0x60106D34 (Data = 0x29BF)
    134. Read 2 bytes @ address 0x60106DE8 (Data = 0x2002)
    135. Read 2 bytes @ address 0x6010955A (Data = 0x4605)
    136. Read 2 bytes @ address 0x6010955C (Data = 0xF7FB)
    137. Read 2 bytes @ address 0x60106F50 (Data = 0x4B68)
    138. Read 4 bytes @ address 0x601070F4 (Data = 0x009204B8)
    139. Read 2 bytes @ address 0x60106F4C (Data = 0xE92D)
    140. Received monitor command: clrbp
    141. Received monitor command: halt
    142. Halting target CPU...
    143. ...Target halted (PC = 0x6010AC9C)
    144. Received monitor command: memU32 0x3039000C 0xAC
    145. Writing 0x000000AC @ address 0x3039000C
    146. Received monitor command: memU32 0x00180000 0x1ffffeff
    147. Writing 0x1FFFFEFF @ address 0x00180000
    148. Received monitor command: memU32 0x00180004 0x6010ac9c
    149. Writing 0x6010AC9C @ address 0x00180004
    150. Received monitor command: memU32 0xE000EDFC 0x01000001
    151. Writing 0x01000001 @ address 0xE000EDFC
    152. Received monitor command: memU32 0x3039000C 0xAA
    153. Writing 0x000000AA @ address 0x3039000C
    154. Read 2 bytes @ address 0x6010467A (Data = 0x4802)
    155. Read 4 bytes @ address 0x60104684 (Data = 0x60127208)
    156. Read 2 bytes @ address 0x6010467A (Data = 0x4802)
    157. Read 4 bytes @ address 0x60104684 (Data = 0x60127208)
    158. Read 2 bytes @ address 0x6010467A (Data = 0x4802)
    159. Received monitor command: regs
    160. R0 = 00000000, R1 = 00000000, R2 = 00000000, R3 = 00000000
    161. R4 = 00000000, R5 = 00000000, R6 = 00000000, R7 = 00000000
    162. R8 = 00000000, R9 = 00000000, R10= 00000000, R11= 00000000
    163. R12= 00000000, R13= 1FFFFEFC, MSP= 1FFFFEFC, PSP= 00000000
    164. R14(LR) = FFFFFFFF, R15(PC) = 6010AC9C
    165. XPSR 01000000, APSR 00000000, EPSR 01000000, IPSR 00000000
    166. CFBP 00000000, CONTROL 00, FAULTMASK 00, BASEPRI 00, PRIMASK 00
    167. Reading all registers
    168. Read 4 bytes @ address 0x6010AC9C (Data = 0x49144813)
    169. Read 2 bytes @ address 0x6010AC9C (Data = 0x4813)
    170. Setting breakpoint @ address 0x60102348, Size = 2, BPHandle = 0x0000
    171. WARNING: No more breakpoint resources left
    172. ERROR: Failed to set breakpoint at 0x60102348
    173. Setting breakpoint @ address 0x6010467A, Size = 2, BPHandle = 0x0000
    174. WARNING: No more breakpoint resources left
    175. ERROR: Failed to set breakpoint at 0x6010467A
    176. Read 2 bytes @ address 0x6010467A (Data = 0x4802)
    177. Read 4 bytes @ address 0x60104684 (Data = 0x60127208)
    178. Read 2 bytes @ address 0x6010467A (Data = 0x4802)
    179. Read 4 bytes @ address 0x60104684 (Data = 0x60127208)
    180. Read 2 bytes @ address 0x6010467A (Data = 0x4802)
    181. GDB closed TCP/IP connection
    Display All

  • Hello,

    Thank you for your inquiry.

    jmcclintock wrote:

    For my current debugging I am stopping the A-core in UBOOT and running the "sf probe" command with essentially sets up the QUAD-SPI interface allowing access.
    Unfortunately we can't comment on UBOOT as it is not our software, so we have no control if UBOOT is executing the correct init steps.

    The imx7D series SPI programming is already supported by J-Link to work out-of-the-box.
    More information can be found here: wiki.segger.com/IMX7D

    jmcclintock wrote:

    I did try using J-FLASH but the memory part is not in the supported list (Maybe it's not supported at all?).
    It is supported: segger.com/products/debug-prob…es/supported-spi-flashes/
    In J-Flash you need to select the correct imx7D as device, SPI Flash detection then is automatic: wiki.segger.com/IMX_Series_Devices


    Best regards,

    Nino
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.

  • Hello,

    Flash BP are included in J-Link models J-Link Plus or higher.
    So for a J-Link Base you need an extra license for Flash BP as well.
    You can also purchase an upgrade package from J-Link Base to Plus which includes both licenses:
    8.08.13 J-Link Upgrade BASE to PLUS segger.com/purchase/pricing/jlink-related/

    Best regards,
    Nino
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.

  • Hi Nino,

    With a temp J-FLASH license I am able to program our QUAD-SPI part successfully. Do I need the Flash BP license to do ANY flash-breakpoints, or just UNLIMITED flash-breakpoints? Currently it will still not create even a single flash-breakpoint.

  • Hello,

    You will need a Flash BP license if you want any Flash BP. Unlimited is then just a bonus.

    Best regards,
    Nino
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.

  • Hello Nino - thank you again for the assistance, I think it is almost working, here is what I have found with both a temp J-FLASH and FLASH BP license.

    1) If I connect to the iMX7D Sabre SD board with the M4 core as the target, I connect just fine but I am unable to set any flash breakpoints, it always fails.
    2) If I connect with the A7_0 as the target, I AM able to set flash breakpoints, but these are never 'hit'

    Maybe it's the way in which we are running our two cores that is the issue? We have the A7 booting from the CF card (UBOOT and Linux), and we have our M4 application in the QUADSPI NOR flash. We have scripts in UBOOT to launch the M4 processor before we boot into Linux.

    I am trying to debug the QUADSPI M4 application on the M4 via Eclipse. This works fine for RAM-only applications when specifying the M4 as the target core, but still no luck with flash applications.

    I have tried stopping the A7 core in UBOOT; the J-LINK attaches to the A7 fine and updates the QUADSPI application and sets the breakpoints OK, but typically results in a reboot of the both cores and the breakpoints are never hit - I get various errors about being unable to read a memory location in QUADSPI memory (0x6010xxxx) and then immediately after an error about being unable to read memory 0xDEADBEEF.

    I have tried removing the CF card so that the A7 is not running anything; the flash loads and breakpoints are set without issue but then it fails with ERROR: Could not start CPU core. Then JLinkGDBServerCL.exe crashes.

    Do you know of anyone who it trying to debug in QUADSPI for the M4 that has it working?

    thank you again,
    Jeremy

  • Hello Jeremy,

    Could you open a support ticket in that regard?
    You can find a link to the ticket site in my signature.

    Best regards,
    Nino
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.