[SOLVED] support of Cypress S6J335EKS, Error: Cortex-A/R (connect): Core internal signal DBGEN is not asserted. Debugging is not possible.

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  • [SOLVED] support of Cypress S6J335EKS, Error: Cortex-A/R (connect): Core internal signal DBGEN is not asserted. Debugging is not possible.

    Dear Segger support team,

    we are working with the Cypress S6J335EKS device. We would like to use the Segger J-Link for programming this device, but official support(using J-Flash) of this device is not implement yet. When do you to release the support for this device?

    On the other hand, we try to communicate with the S6J335EKS using J-link commander, but we obtain an error "Error: Cortex-A/R (connect): Core internal signal DBGEN is not asserted. Debugging is not possible.". What is the reason of this error and how can we solve this problem? The log from j-link commander:

    Please specify device / core. <Default>: CORTEX-R5
    Type '?' for selection dialog
    Device>cortex-r5
    Please specify target interface:
    J) JTAG (Default)
    S) SWD
    T) cJTAG
    TIF>j
    Device position in JTAG chain (IRPre,DRPre) <Default>: -1,-1 => Auto-detect
    JTAGConf>
    Specify target interface speed [kHz]. <Default>: 4000 kHz
    Speed>
    Device "CORTEX-R5" selected.




    Connecting to target via JTAG
    TotalIRLen = 9, IRPrint = 0x0011
    JTAG chain detection found 2 devices:
    #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP
    #1 Id: 0x1000B5CF, IRLen: 05, Unknown device
    Scanning AP map to find all available APs
    AP[3]: Stopped AP scan as end of AP map has been reached
    AP[0]: AHB-AP (IDR: 0x44770001)
    AP[1]: APB-AP (IDR: 0x24770002)
    AP[2]: JTAG-AP (IDR: 0x14760010)
    Iterating through AP map to find AHB-AP to use
    AP[0]: Skipped. Not an APB-AP
    AP[1]: APB-AP found
    ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID:04-003BB907 ETB
    ROMTbl[0][1]: CompAddr: 80002000 CID: B105900D, PID:04-003BB906 CTI
    ROMTbl[0][2]: CompAddr: 80003000 CID: B105900D, PID:04-004BB912 TPIU
    ROMTbl[0][3]: CompAddr: 80004000 CID: B105900D, PID:04-001BB908 CSTF
    ROMTbl[0][4]: CompAddr: 80080000 CID: B105100D, PID:04-000BB4B5 ROM Table
    ROMTbl[1][0]: CompAddr: 80090000 CID: B105900D, PID:04-004BBC15 Cortex-R5
    Found Cortex-R5 r1p3
    8 code breakpoints, 8 data breakpoints
    Debug architecture ARMv7.0
    TotalIRLen = ?, IRPrint = 0x..000000000000000000000000
    TotalIRLen = 9, IRPrint = 0x0011
    JTAG chain detection found 2 devices:
    #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP
    #1 Id: 0x1000B5CF, IRLen: 05, Unknown device



    ****** Error: Cortex-A/R (connect): Core internal signal DBGEN is not asserted. Debugging is not possible.
    TotalIRLen = 9, IRPrint = 0x0011
    JTAG chain detection found 2 devices:
    #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP
    #1 Id: 0x1000B5CF, IRLen: 05, Unknown device
    TotalIRLen = ?, IRPrint = 0x..000000000000000000000000
    TotalIRLen = 9, IRPrint = 0x0011
    JTAG chain detection found 2 devices:
    #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP
    #1 Id: 0x1000B5CF, IRLen: 05, Unknown device
    Cannot connect to target.



    Thank you for your answer!
    Best regards,

    milanatik
  • Hello,

    Thank you for your inquiry.
    Currently we do not have any S6J335 hardware in house to implement support.
    We do support the S6J334 series however. If this core is compatible to the 35 series you can use this instead.
    In the meantime we will get in touch with Cypress and see if we can get hardware samples for support.

    The Cypress Traveo cores that we support currently all needed more complex init setups running to be able to access the target. So this is most likely needed for the 35 series as well.
    If you are in a hurry you can find more information on how to add support for new devices here: wiki.segger.com/Adding_Support_for_New_Devices

    Best regards,
    Nino
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