[SOLVED] Debug Tickless FreeRTOS with WFI

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  • [SOLVED] Debug Tickless FreeRTOS with WFI


    I'm trying to debug FreeRTOS with the tickless feature enabled (i.e. uses WFI) on a iMX RT1050 CPU.
    If the CPU is executing the WFI instruction J-Link fails to connect with the following error:

    "ERROR: Could not find core in Coresight setup"
    "Could not connect to target"

    There is no problem outside of WFI. The full log follows below.

    My question is: how can I flash and debug a software that uses the WFI instruction?


    Source Code

    1. Could not connect to target.
    2. SEGGER J-Link GDB Server V6.34b Command Line Version
    3. JLinkARM.dll V6.34b (DLL compiled Aug 13 2018 16:38:47)
    4. Command line: -nosilent -swoport 2332 -select USB=50121431 -telnetport
    5. 2333 -singlerun -endian little -ir -speed auto -port 2331 -vd -device
    6. MIMXRT1051xxxxB -if SWD -halt -reportuseraction
    7. -----GDB Server start settings-----
    8. GDBInit file: none
    9. GDB Server Listening port: 2331
    10. SWO raw output listening port: 2332
    11. Terminal I/O port: 2333
    12. Accept remote connection: yes
    13. Generate logfile: off
    14. Verify download: on
    15. Init regs on start: on
    16. Silent mode: off
    17. Single run mode: on
    18. Target connection timeout: 0 ms
    19. ------J-Link related settings------
    20. J-Link Host interface: USB
    21. J-Link script: none
    22. J-Link settings file: none
    23. ------Target related settings------
    24. Target device: MIMXRT1051xxxxB
    25. Target interface: SWD
    26. Target interface speed: auto
    27. Target endian: little
    28. Connecting to J-Link...
    29. J-Link is connected.
    30. Device "MIMXRT1051XXXXB" selected.
    31. Firmware: J-Link V10 compiled Jul 23 2018 09:53:14
    32. Hardware: V10.10
    33. S/N: 50121431
    34. Feature(s): GDB
    35. Checking target voltage...
    36. Target voltage: 3.24 V
    37. Listening on TCP/IP port 2331
    38. Connecting to target...Found SW-DP with ID 0x0BD11477
    39. Scanning AP map to find all available APs
    40. AP[1]: Stopped AP scan as end of AP map has been reached
    41. AP[0]: AHB-AP (IDR: 0x04770041)
    42. Iterating through AP map to find AHB-AP to use
    43. AP[0]: Skipped. Invalid implementer code read from CPUIDVal[31:24] = 0x00
    44. Found SW-DP with ID 0x0BD11477
    45. Scanning AP map to find all available APs
    46. AP[1]: Stopped AP scan as end of AP map has been reached
    47. AP[0]: AHB-AP (IDR: 0x04770041)
    48. Iterating through AP map to find AHB-AP to use
    49. AP[0]: Core found
    50. AP[0]: AHB-AP ROM base: 0xE00FD000
    51. CPUID register: 0x411FC271. Implementer code: 0x41 (ARM)
    52. Found Cortex-M7 r1p1, Little endian.
    53. FPUnit: 8 code (BP) slots and 0 literal slots
    54. CoreSight components:
    55. ROMTbl[0] @ E00FD000
    56. ROMTbl[0][0]: E00FE000, CID: B105100D, PID: 000BB4C8 ROM Table
    57. ROMTbl[1] @ E00FE000
    58. ROMTbl[1][0]: E00FF000, CID: B105100D, PID: 000BB4C7 ROM Table
    59. ROMTbl[2] @ E00FF000
    60. ROMTbl[2][0]: E000E000, CID: B105E00D, PID: 000BB00C SCS-M7
    61. ROMTbl[2][1]: E0001000, CID: B105E00D, PID: 000BB002 DWT
    62. ROMTbl[2][2]: E0002000, CID: B105E00D, PID: 000BB00E FPB-M7
    63. ROMTbl[2][3]: E0000000, CID: B105E00D, PID: 000BB001 ITM
    64. ROMTbl[1][1]: E0041000, CID: B105900D, PID: 001BB975 ETM-M7
    65. ROMTbl[1][2]: E0042000, CID: B105900D, PID: 004BB906 CTI
    66. ROMTbl[0][1]: E0040000, CID: B105900D, PID: 000BB9A9 TPIU-M7
    67. ROMTbl[0][2]: E0043000, CID: B105F00D, PID: 001BB101 TSG
    68. Cache: Separate I- and D-cache.
    69. I-Cache L1: 32 KB, 512 Sets, 32 Bytes/Line, 2-Way
    70. D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way
    71. ERROR: Could not find core in Coresight setup
    72. ERROR: Could not connect to target.
    73. Target connection failed. GDBServer will be closed...Restoring target state and closing J-Link connection...
    74. Shutting down...
    75. Could not connect to target.
    76. Please check power, connection and settings.
    Display All
  • Hello,

    Thank you for your inquiry.
    Generally the J-Link does not care if a CPU is in tickless mode or not.
    If it hits a WFI it depends on the target device how it will behave.
    Should the target device disable debug clocks and/or the debug interface J-Link can't connect to the device.
    For more information we recommend consulting the imxRT user guide or NXP support directly.

    Best regards,
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