[ABANDONED] Jlink error programming KL28Z

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  • [ABANDONED] Jlink error programming KL28Z

    I'm trying to program a KL28Z in a custom pcb. Programming fails at some point so I tried to fall back to simpler scenario of erasing the chip flash. Not even this seems to work as I see the following error:

    Connecting to target via SWD
    InitTarget()
    Found SW-DP with ID 0x2BA01477
    AP map detection skipped. Manually configured AP map found.
    AP[0]: AHB-AP (IDR: Not set)
    AP[1]: CUSTOM-AP (IDR: Not set)
    AP[0]: Core found
    AP[0]: AHB-AP ROM base: 0xF0002000
    CPUID register: 0x410CC601. Implementer code: 0x41 (ARM)
    Found Cortex-M0 r0p1, Little endian.
    FPUnit: 2 code (BP) slots and 0 literal slots
    CoreSight components:
    ROMTbl[0] @ F0002000
    ROMTbl[0][0]: F0000000, CID: B105900D, PID: 001BB932 MTB-M0+
    ROMTbl[0][1]: F0001000, CID: B105900D, PID: 0008E000 MTBDWT
    ROMTbl[0][2]: F0006000, CID: B105900D, PID: 000BB9A6 ???
    ROMTbl[0][3]: E00FF000, CID: B105100D, PID: 000BB4C0 ROM Table
    ROMTbl[1] @ E00FF000
    ROMTbl[1][0]: E000E000, CID: B105E00D, PID: 000BB008 SCS
    ROMTbl[1][1]: E0001000, CID: B105E00D, PID: 000BB00A DWT
    ROMTbl[1][2]: E0002000, CID: B105E00D, PID: 000BB00B FPB
    Cortex-M0 identified.
    Erasing device...


    ****** Error: Failed to erase sectors 192 @ address 0x00060000 (Algo91: Illegal command)
    J-Link: Flash download: Total time needed: 1.434s (Prepare: 0.018s, Compare: 0.000s, Erase: 1.412s, Program: 0.000s, Verify: 0.000s, Restore: 0.002s)
    ERROR: Erase returned with error code -5.
    J-Link>unlock kinetis
    Found SWD-DP with ID 0x2BA01477
    Unlocking device...O.K.
    J-Link>erase
    Erasing device...


    ****** Error: Failed to erase sectors 192 @ address 0x00060000 (Algo91: Illegal command)
    J-Link: Flash download: Total time needed: 1.476s (Prepare: 0.039s, Compare: 0.000s, Erase: 1.413s, Program: 0.000s, Verify: 0.000s, Restore: 0.023s)
    ERROR: Erase returned with error code -5.


    All boards seem to fail in address 0x00060000, so I can discard any issues with specific chips. I also run the "unlock kinetis" command so I can also discard that.



    Any thoughts?

    BR
    Genis
  • Hello Genis,

    Thank you for your inquiry.
    Such an issue is not known to us.
    We tried to reproduce the issue with a X-TWR-KL28Z72M eval board but everything was working as expected.
    Which J-Link software version are you using?
    Could you provide a J-Link log of the failed session?
    wiki.segger.com/Enable_J-Link_log_file

    What is the exact device description printed on your MCU?

    Do you have the reset line connected to the J-Link debug interface?

    Does programming only a specific image fail or with any image?

    What were your exact programming steps?


    Best regards,

    Nino
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