[ABANDONED] connection is ok but core is not found

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  • [ABANDONED] connection is ok but core is not found

    I’m encountering a scenario where a connection to a target is successful but the core is not found. The core is not found during the first two connections but is found on the third connection and all connections thereafter. When a connection with a core is successful all connects thereafter are successful. How can I interpret such behavior? Does it point to a hardware issued?

  • Hello,

    Thank you for your inquiry.
    Such an issue is not known to us.
    Are you using custom hardware or an eval board?
    We tried to reproduce the issue with a SAMV71 XPlained Ultra eval board which is recommended by Microchip for SAMS70 series evaluation and we could connect always to the board without any issues.
    We assume it is related to bad signals between J-Link and target device.
    Could you try another cable between J-Link and target?
    How do the signals look like? Could you measure them with an oscilloscope?
    Do you see any differences between the SAMV71 XPlained Ultra eval board debug interface and on your design?

    We noticed you are using a J-Link EDU and your account is registered with a company name. Be aware that commercial use of the J-Link EDU is illegal.
    More information can be used in the J-Link EDU Terms of Use: segger.com/products/debug-probes/j-link/models/j-link-edu/

    If you are using this J-Link in a commercial manners we have to ask you to stop its usage and purchase a J-Link for commercial use.


    Best regards,

    Nino
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