Hello,
I see issue when I try to work with different HW boards. It is the same boards, but just several exemplars.
When I switch to other exemplar of target HW (with older FW in flash), as a result I see CPU in some hard fault or in other OS configASSERT trap. There .gdb log shows that all Downloads are verified with OK mark.
I'm a little bit confused that same .elf files have different behavior based on debugger selection.
Also, after programming target HW by ST-LINK, I able correctly work with target board.
Used SW and HW:
SEGGER J-Link GDB Server V6.32i Command Line Version
Firmware: J-Link Pro V4 compiled Apr 20 2018 16:46:30
I do not use RTOS extension/plugin in this case.
I'm use SWD interface with SWDIO, SWCLK, GND, VTref, nRESET
described here segger.com/products/debug-prob…gy/interface-description/
Is there a correct load of two .elf files in attached startup scripts? (bootloader + App)
Another important note: The bootloader part is the same in different FW versions, located in first 48K (3 blocks).
Target MCU: STM32F429VE
What could be wrong?
I see issue when I try to work with different HW boards. It is the same boards, but just several exemplars.
When I switch to other exemplar of target HW (with older FW in flash), as a result I see CPU in some hard fault or in other OS configASSERT trap. There .gdb log shows that all Downloads are verified with OK mark.
I'm a little bit confused that same .elf files have different behavior based on debugger selection.
Also, after programming target HW by ST-LINK, I able correctly work with target board.
Used SW and HW:
SEGGER J-Link GDB Server V6.32i Command Line Version
Firmware: J-Link Pro V4 compiled Apr 20 2018 16:46:30
I do not use RTOS extension/plugin in this case.
I'm use SWD interface with SWDIO, SWCLK, GND, VTref, nRESET
described here segger.com/products/debug-prob…gy/interface-description/
Is there a correct load of two .elf files in attached startup scripts? (bootloader + App)
Another important note: The bootloader part is the same in different FW versions, located in first 48K (3 blocks).
Target MCU: STM32F429VE
What could be wrong?
The post was edited 2 times, last by Aseris ().