HW: Silicon Labs starter kit - STK3600 - EFM32LG990F256
Integrated Segger J-Link USB debugger/emulator
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$ JLinkExe
SEGGER J-Link Commander V6.32d (Compiled May 28 2018 16:59:04)
DLL version V6.32d, compiled May 28 2018 16:58:57
Connecting to J-Link via USB...O.K.
Firmware: Energy Micro EFM32 compiled Mar 1 2013 14:08:50
Hardware version: V7.00
S/N: 440096237
License(s): GDB, RDI
VTref=3.286V
Type "connect" to establish a target connection, '?' for help
J-Link>connect
Please specify device / core. <Default>: EFM32LG990F256
Type '?' for selection dialog
Device>EFM32LG990F256
Please specify target interface:
J) JTAG (Default)
S) SWD
TIF>S
Specify target interface speed [kHz]. <Default>: 4000 kHz
Speed>4000
Device "EFM32LG990F256" selected.
Connecting to target via SWD
Found SW-DP with ID 0x2BA01477
Scanning AP map to find all available APs
AP[1]: Stopped AP scan as end of AP map has been reached
AP[0]: AHB-AP (IDR: 0x24770011)
Iterating through AP map to find AHB-AP to use
AP[0]: Core found
AP[0]: AHB-AP ROM base: 0xE00FF000
CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
Found Cortex-M4 r0p1, Little endian.
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WARNING: Identified core does not match configuration. (Found: Cortex-M4, Configured: Cortex-M3)
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FPUnit: 6 code (BP) slots and 2 literal slots
CoreSight components:
ROMTbl[0] @ E00FF000
ROMTbl[0][0]: E000E000, CID: B105E00D, PID: 000BB00C SCS-M7
ROMTbl[0][1]: E0001000, CID: B105E00D, PID: 003BB002 DWT
ROMTbl[0][2]: E0002000, CID: B105E00D, PID: 002BB003 FPB
ROMTbl[0][3]: E0000000, CID: B105E00D, PID: 003BB001 ITM
ROMTbl[0][4]: E0040000, CID: B105900D, PID: 003BB923 TPIU-Lite
ROMTbl[0][5]: E0041000, CID: B105900D, PID: 000BB925 ETM
Cortex-M4 identified.
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The EFM32 is a Cortex M3 why is it being flagged as M4?
Integrated Segger J-Link USB debugger/emulator
****************************************************************************************************
$ JLinkExe
SEGGER J-Link Commander V6.32d (Compiled May 28 2018 16:59:04)
DLL version V6.32d, compiled May 28 2018 16:58:57
Connecting to J-Link via USB...O.K.
Firmware: Energy Micro EFM32 compiled Mar 1 2013 14:08:50
Hardware version: V7.00
S/N: 440096237
License(s): GDB, RDI
VTref=3.286V
Type "connect" to establish a target connection, '?' for help
J-Link>connect
Please specify device / core. <Default>: EFM32LG990F256
Type '?' for selection dialog
Device>EFM32LG990F256
Please specify target interface:
J) JTAG (Default)
S) SWD
TIF>S
Specify target interface speed [kHz]. <Default>: 4000 kHz
Speed>4000
Device "EFM32LG990F256" selected.
Connecting to target via SWD
Found SW-DP with ID 0x2BA01477
Scanning AP map to find all available APs
AP[1]: Stopped AP scan as end of AP map has been reached
AP[0]: AHB-AP (IDR: 0x24770011)
Iterating through AP map to find AHB-AP to use
AP[0]: Core found
AP[0]: AHB-AP ROM base: 0xE00FF000
CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
Found Cortex-M4 r0p1, Little endian.
**************************
WARNING: Identified core does not match configuration. (Found: Cortex-M4, Configured: Cortex-M3)
**************************
FPUnit: 6 code (BP) slots and 2 literal slots
CoreSight components:
ROMTbl[0] @ E00FF000
ROMTbl[0][0]: E000E000, CID: B105E00D, PID: 000BB00C SCS-M7
ROMTbl[0][1]: E0001000, CID: B105E00D, PID: 003BB002 DWT
ROMTbl[0][2]: E0002000, CID: B105E00D, PID: 002BB003 FPB
ROMTbl[0][3]: E0000000, CID: B105E00D, PID: 003BB001 ITM
ROMTbl[0][4]: E0040000, CID: B105900D, PID: 003BB923 TPIU-Lite
ROMTbl[0][5]: E0041000, CID: B105900D, PID: 000BB925 ETM
Cortex-M4 identified.
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The EFM32 is a Cortex M3 why is it being flagged as M4?