STM32 works with J-Link Version 6 but not J-Link Version 8

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  • STM32 works with J-Link Version 6 but not J-Link Version 8

    It is not possible to download a programm with SWD to our hardware with J-Link Version 8, but it is possible to download the same programm to the IAR-Eval-Board (STM32-SK) with the same J-Link on JTAG. With the older J-Link Version 6 both tasks work. So the problem has to be with J-Link Version 8. I use IAR workbench 5.41.
    Mostly I get the error message, that the alignment of the stack pointer is not correct.
    I would appreciate very much to get a helpfull answer from anybody.
    regards
    Silvio
  • Dear Belimo,

    Please post your concern in English as this will avoid double posts of other
    forum members who are searching for the same information.
    Using a common language (in this case English) helps forum members to
    search for topics that might have been already solved.

    I am sorry, but due to this we have remove the conversion from this point onwards.

    -- Admin of SEGGER Forum
  • I am concerned about the quality of your service. Why dont you send me a warning before deleting all the contents???? It was several hours of work to create it.

    Can you still restore it?

    It could be translated to english if needs be. But simply deleting it...
  • Here is what we found out:

    1. The IAR Debugger does not work with J-Link 8.0 (Also with the newest DLL versions 4.14b or 4.15b) (See output below)
    2. The JLink commander seems to work, it can connect , read/write memory and execute "h" and "g". (See outputs below)

    Please do not delete my posts anymore!

    Balazs Schweighoffer

    Output point 1.
    Fri May 21 14:06:08 2010: Loaded macro file: C:\Programme\IAR Systems\Embedded Workbench 5.4_2\arm\config\flashloader\ST\FlashSTM32F10xxx.mac
    Fri May 21 14:06:10 2010: DLL version: V4.15b, compiled May 8 2010 15:29:24
    Fri May 21 14:06:10 2010: Firmware: J-Link ARM V8 compiled Dec 1 2009 11:42:48
    Fri May 21 14:06:10 2010: Selecting SWD as current target interface.
    Fri May 21 14:06:10 2010: JTAG speed is initially set to: 32 kHz
    Fri May 21 14:06:10 2010: Found SWD-DP with ID 0x1BA01477
    Fri May 21 14:06:10 2010: TPIU fitted.
    Fri May 21 14:06:10 2010: FPUnit: 6 code (BP) slots and 2 literal slots
    Fri May 21 14:06:10 2010: Hardware reset with strategy 0 was performed
    Fri May 21 14:06:10 2010: Initial reset was performed
    Fri May 21 14:06:10 2010: JLINK command: ProjectFile = C:\Dokumente und Einstellungen\Eszter&Balazs\Eigene Dateien\LocalDev\belimo_enocean\Implementation\
    MPEnOcean.Gateway\MPEnOceanGateway\settings\MPEnOceanGateway_Release.jlink, return = 0
    Fri May 21 14:06:10 2010: JLINK command: device = STM32F10xxB, return = 0
    Fri May 21 14:06:10 2010: Found SWD-DP with ID 0x1BA01477
    Fri May 21 14:06:10 2010: TPIU fitted.
    Fri May 21 14:06:10 2010: FPUnit: 6 code (BP) slots and 2 literal slots
    Fri May 21 14:06:11 2010: -I- execUserFlashInit!
    Fri May 21 14:06:11 2010: 456 bytes downloaded (1.14 Kbytes/sec)
    Fri May 21 14:06:11 2010: Loaded debugee: C:\Programme\IAR Systems\Embedded Workbench 5.4_2\arm\config\flashloader\ST\FlashSTM32F10xxxRAM16K.out
    Fri May 21 14:06:13 2010: Warning: Stack pointer is setup to incorrect alignment. Stack addr = 0xAAAAAAAA
    Fri May 21 14:06:13 2010: Target reset
    Fri May 21 14:06:14 2010: Failed to set breakpoint at 0x20000120
    Fri May 21 14:06:14 2010: Warning: Number of data breakpoints supported by target is invalid, assumed to be 4
    Fri May 21 14:06:15 2010: Warning: Number of (flash) code breakpoints supported by target is invalid, assumed to be 6
    Fri May 21 14:06:18 2010: Fatal error: CPU is not halted Session aborted!
    Fri May 21 14:06:18 2010: Downloaded C:\Dokumente und Einstellungen\Eszter&Balazs\Eigene Dateien\LocalDev\belimo_enocean\Implementation\
    MPEnOcean.Gateway\MPEnOceanGateway\Release\Exe\MPEnOceanGateway.out to flash memory.
    Fri May 21 14:06:18 2010: Failed to load debugee: C:\Dokumente und Einstellungen\Eszter&Balazs\Eigene Dateien\LocalDev\belimo_enocean\Implementation\
    MPEnOcean.Gateway\MPEnOceanGateway\Release\Exe\MPEnOceanGateway.out


    Output point 2.
    SEGGER J-Link Commander V4.14b ('?' for help)
    Compiled May 8 2010 16:31:57
    DLL version V4.14b, compiled May 8 2010 16:31:37
    Firmware: J-Link ARM V8 compiled Dec 1 2009 11:42:48
    Hardware: V8.00
    S/N : 158001691
    OEM : IAR
    Info: TotalIRLen = ?, IRPrint = 0x..000000000000000000000000

    WARNING: No matching core found. Selecting default core (ARM7).
    Info: TotalIRLen = ?, IRPrint = 0x..000000000000000000000000
    VTarget = 2.802V
    Info: TotalIRLen = ?, IRPrint = 0x..000000000000000000000000

    ****** Error: Could not find supported CPU core on JTAG chain
    No devices found on JTAG chain. Trying to find device on SWD.
    Info: Found SWD-DP with ID 0x1BA01477
    Info: TPIU fitted.
    Info: FPUnit: 6 code (BP) slots and 2 literal slots
    Cortex-M3 identified.
    JTAG speed: 100 kHz
    J-Link>



    SEGGER J-Link Commander V4.15b ('?' for help)
    Compiled May 8 2010 15:29:44
    DLL version V4.15b, compiled May 8 2010 15:29:24
    Firmware: J-Link ARM V8 compiled Dec 1 2009 11:42:48
    Hardware: V8.00
    S/N : 158001691
    OEM : IAR
    Info: TotalIRLen = ?, IRPrint = 0x..000000000000000000000000

    WARNING: No matching core found.
    Info: TotalIRLen = ?, IRPrint = 0x..000000000000000000000000
    VTarget = 2.808V
    Info: TotalIRLen = ?, IRPrint = 0x..000000000000000000000000

    ****** Error: Could not find supported CPU core on JTAG chain
    No devices found on JTAG chain. Trying to find device on SWD.
    Info: Found SWD-DP with ID 0x1BA01477
    Info: TPIU fitted.
    Info: FPUnit: 6 code (BP) slots and 2 literal slots
    Cortex-M3 identified.
    JTAG speed: 100 kHz
    J-Link>

    J-Link>mem 20000000 100
    20000000 = 1A 62 81 9B 5A B8 01 DE C0 D8 1D BB 4B 48 09 FE
    20000010 = 68 EF 5E 96 79 6D 7C C4 27 75 04 65 EB E0 2C E9
    20000020 = E6 DF A8 76 8A 37 16 54 DB 3D 67 0D A2 35 A6 29
    20000030 = A3 B8 AA 1A 25 1B B7 78 A9 47 10 CE B9 FF B5 2A
    20000040 = E9 00 56 48 C8 3A F3 68 0D 1E 4F 2F 1D 73 50 B3
    20000050 = D5 5C 89 CD 6C CC B3 2E EE 2D C6 F1 E8 0D 05 48
    20000060 = 4D 25 50 E5 7E 29 A6 C5 72 8E 24 B6 7C 07 E1 C4
    20000070 = 5F 9F 64 B0 1A 29 F8 9B 98 37 EF 83 94 55 55 C3
    20000080 = FA 9E 9A 78 DC 14 38 3D A5 D1 05 C7 89 3D CE 33
    20000090 = AC 8A E0 AA FD A0 48 43 71 5C 41 E8 FB EE CA 48
    200000A0 = 2A 2E A8 FC A7 E6 8C 1F F5 B6 A4 8F B2 06 AC AC
    200000B0 = E5 EA 8A E2 A5 4B CD CF C7 5F ED 41 84 5E A2 07
    200000C0 = 10 0D 45 D7 2C 95 ED F6 EA 76 C6 A1 47 45 F0 E1
    200000D0 = 20 56 DC 07 FC 62 BC 8F 32 2C E8 7D 12 60 54 2D
    200000E0 = B1 81 E2 78 C8 82 93 1A CE FC 8E 9A 00 D5 8C 31
    200000F0 = 59 75 14 14 3B 6A 47 AA FE 93 20 66 66 92 64 34
    J-Link>w2 20000000 aabb
    Writing AABB -> 20000000
    J-Link>w2 20000002 ccdd
    Writing CCDD -> 20000002
    J-Link>mem 20000000 100
    20000000 = BB AA DD CC 5A B8 01 DE C0 D8 1D BB 4B 48 09 FE
    20000010 = 68 EF 5E 96 79 6D 7C C4 27 75 04 65 EB E0 2C E9
    20000020 = E6 DF A8 76 8A 37 16 54 DB 3D 67 0D A2 35 A6 29
    20000030 = A3 B8 AA 1A 25 1B B7 78 A9 47 10 CE B9 FF B5 2A
    20000040 = E9 00 56 48 C8 3A F3 68 0D 1E 4F 2F 1D 73 50 B3
    20000050 = D5 5C 89 CD 6C CC B3 2E EE 2D C6 F1 E8 0D 05 48
    20000060 = 4D 25 50 E5 7E 29 A6 C5 72 8E 24 B6 7C 07 E1 C4
    20000070 = 5F 9F 64 B0 1A 29 F8 9B 98 37 EF 83 94 55 55 C3
    20000080 = FA 9E 9A 78 DC 14 38 3D A5 D1 05 C7 89 3D CE 33
    20000090 = AC 8A E0 AA FD A0 48 43 71 5C 41 E8 FB EE CA 48
    200000A0 = 2A 2E A8 FC A7 E6 8C 1F F5 B6 A4 8F B2 06 AC AC
    200000B0 = E5 EA 8A E2 A5 4B CD CF C7 5F ED 41 84 5E A2 07
    200000C0 = 10 0D 45 D7 2C 95 ED F6 EA 76 C6 A1 47 45 F0 E1
    200000D0 = 20 56 DC 07 FC 62 BC 8F 32 2C E8 7D 12 60 54 2D
    200000E0 = B1 81 E2 78 C8 82 93 1A CE FC 8E 9A 00 D5 8C 31
    200000F0 = 59 75 14 14 3B 6A 47 AA FE 93 20 66 66 92 64 34
    J-Link>

    J-Link>g
    J-Link>h
    R0 = EF362FEE, R1 = EF5FFD7A, R2 = E262D065, R3 = 2E84AF63
    R4 = FF3FABFF, R5 = A85DBFDB, R6 = E8464CD9, R7 = FDB79634
    R8 = FBF77F5E, R9 = FF7FFFDE, R10= B4707165, R11= 3F7E46D2
    R12= FFFDEFFF, R13= FFFFFFDC, MSP= FFFFFFDC, PSP= 3C15E470
    R14(LR) = FFFFFFF9, R15(PC) = FFFFFFFE
    XPSR 01000003, APSR 00000000, EPSR 01000000, IPSR 00000003
    CFBP 00000000, CONTROL 00, FAULTMASK 00, BASEPRI 00, PRIMASK 00
  • Hi Belimo,

    since
    a) both the V6 and the V8 work fine with an eval board, there are only problems with the custom hardware + V8
    b) general communication via J-Link commander works even on your custom hardware + V8

    we assume this to be a hardware related issue or a setup related issue
    on your custom hardware which does not appear on the V6 (or only shows very rarely).
    It does not seem to be a general problem with J-Link + STM32 since on the eval board(s) everything is working fine.

    Tip from our side:
    1. You should check your hardware against the schematics of the eval board in order to identify fundamental differences.
    2. You should also check your IAR setup (interface speed, initialization performed in macro file etc.) for potential problems.