My target processor is a Kinetis K64 which has an ETB. I am using trace with Ozone over SWD. At first I was getting Unknown Address in the trace listing and corrected this by adding Exec.Command("ReadIntoTraceCache 0x1FFF0000 0x40000") to AfterTargetDownload().
A block of flash beginning with the function of interest is copied to RAM and that function is called using the appropriate pointer-to-function. The copied block is larger than the function of interest so additional, unused, instructions are copied to RAM as well.
The immediate problem is that trace is suggesting that instructions AFTER the function are being called but, using a hardware breakpoint, the processor does not appear to hit these instructions.
Below is a excerpt from the trace capture. I set two hardware breakpoints. The first is the return (pop of some registers and program counter) from the desired RAM function. This breakpoint works. When I examine the stack I can see that the proper return address will be copied to the PC and indeed it returns to the caller which is in flash. However, a breakpoint set after this never halts the processor.
I'm dealing with a very nasty reset problem and believe a proper trace will help me debug this but I don't trust what trace is telling me. I certainly wouldn't expect code to execute past the POP instruction but then again if it is it might explain the issue.
1FFF0E60 LDRB,"R0, [R3]"
1FFF0E62 AND,"R0, R0, #0x31"
1FFF0E64 MOVS,"R1, R6"
1FFF0E66 POP,"{R3-R5, PC}" <---- HW Breakpoint Hit
1FFF0E68 BLX,"R3"
1FFF0E6A B,"0x0FFF0E58"
1FFF0E6C SUB,"SP, SP, #0x08"
1FFF0E6E MOVS,"R3, #0x00"
1FFF0E70 STR,"R3, [SP, #0x04]"
1FFF0E72 B,"0x0FFF0E6E"
1FFF0E74 PUSH,"{R3-R7, LR}" <--- HW Breakpoint Ignored
A block of flash beginning with the function of interest is copied to RAM and that function is called using the appropriate pointer-to-function. The copied block is larger than the function of interest so additional, unused, instructions are copied to RAM as well.
The immediate problem is that trace is suggesting that instructions AFTER the function are being called but, using a hardware breakpoint, the processor does not appear to hit these instructions.
Below is a excerpt from the trace capture. I set two hardware breakpoints. The first is the return (pop of some registers and program counter) from the desired RAM function. This breakpoint works. When I examine the stack I can see that the proper return address will be copied to the PC and indeed it returns to the caller which is in flash. However, a breakpoint set after this never halts the processor.
I'm dealing with a very nasty reset problem and believe a proper trace will help me debug this but I don't trust what trace is telling me. I certainly wouldn't expect code to execute past the POP instruction but then again if it is it might explain the issue.
1FFF0E60 LDRB,"R0, [R3]"
1FFF0E62 AND,"R0, R0, #0x31"
1FFF0E64 MOVS,"R1, R6"
1FFF0E66 POP,"{R3-R5, PC}" <---- HW Breakpoint Hit
1FFF0E68 BLX,"R3"
1FFF0E6A B,"0x0FFF0E58"
1FFF0E6C SUB,"SP, SP, #0x08"
1FFF0E6E MOVS,"R3, #0x00"
1FFF0E70 STR,"R3, [SP, #0x04]"
1FFF0E72 B,"0x0FFF0E6E"
1FFF0E74 PUSH,"{R3-R7, LR}" <--- HW Breakpoint Ignored