[SOLVED] Break OpenFlashLoader at least since v6.20e for Cortex-R4

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  • [SOLVED] Break OpenFlashLoader at least since v6.20e for Cortex-R4

    Hello!

    I use OpenFlashLoader for programming EEPROM on my custom board with RM46L852 chip.

    v6.18c is working. But JLinkARM.dll from v6.20c or v6.20e is not working: message "Unsupported CPU" appears.

    What does it means?

    Regards,
    Vitaliy

  • Hi Vitaliy,

    Open Flashloader is supported on Cortex-M/R/A targets.
    Could you please provide us with a screenshot of the error message?
    Which application (J-Link Commander, J-Flash, 3rd party IDE) do you use with Open FlashLoader?

    Best regards,
    Niklas
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.

  • Hello, Nicklas.

    I use JLink.exe.
    Here is your template project for Segger Embedded Studio (Cortex A/R core) with smallest modification for working on RM46L852 chip.
    Also I add a sample of JLinkDevices.xml for working on my chip.
    If you add JLinkARM.dll from Segger JLink v6.20e and JLink.exe in working directory and run test.cmd then you get that log:
    >test.cmd

    Z:\OpenFlashLoader_CortexAR_Template_EmbeddedStudio>JLink.exe
    -device RM46L852_EEPROM -if jtag -autoconnect 1 -jtagconf -1,-1 -speed
    2000 -CommanderScript prgEeprom.jlink
    SEGGER J-Link Commander V6.18c (Compiled Aug 21 2017 16:47:16)
    DLL version V6.20e, compiled Oct 6 2017 17:05:40


    Script file read successfully.
    Processing script file...

    J-Link connection not established yet but required for command.
    Connecting to J-Link via USB...O.K.
    Firmware: J-Link Ultra V4 compiled Oct 6 2017 16:38:09
    Hardware version: V4.00
    S/N: 504400221
    License(s): RDI, FlashBP, FlashDL, JFlash, GDB
    VTref = 3.262V
    Target connection not established yet but required for command.
    Device "RM46L852_EEPROM" selected.


    Connecting to target via JTAG
    J-Link script: InitTarget()
    J-Link script: found RM48L950 rev.A
    TotalIRLen = 10, IRPrint = 0x0011
    JTAG chain detection found 2 devices:
    #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP
    #1 Id: 0x2B95502F, IRLen: 06, TI ICEPick
    ARM AP[0]: 0x44770001, AHB-AP
    ARM AP[1]: 0x24770002, APB-AP
    ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID:04-007BBC14 Cortex-R4
    Found Cortex-R4 r1p3
    6 code breakpoints, 2 data breakpoints
    Debug architecture ARMv7.0
    Data endian: little
    Main ID register: 0x411FC143
    TCM Type register: 0x00010001
    MPU Type register: 0x00000C00
    System control register:
    Instruction endian: little
    Level-1 instruction cache disabled
    Level-1 data cache disabled
    MPU disabled
    Branch prediction enabled
    Cortex-R4 identified.
    Reset delay: 0 ms
    Reset type NORMAL: Toggle reset pin and halt CPU core.
    J-Link script: ResetTarget()

    Downloading file [16bytes.bin]...

    ****** Error: FLASH_CMSIS: The connected CPU core is not supported by this flash module.
    Error while determining flash info (Bank @ 0x00000000)
    Unspecified error -1

    Reset delay: 0 ms
    Reset type NORMAL: Toggle reset pin and halt CPU core.
    J-Link script: ResetTarget()



    Script processing completed.

    If you change JLinkARM.dll from v6.18c then you get expected log:
    >test.cmd

    Z:\OpenFlashLoader_CortexAR_Template_EmbeddedStudio>JLink.exe
    -device RM46L852_EEPROM -if jtag -autoconnect 1 -jtagconf -1,-1 -speed
    2000 -CommanderScript prgEeprom.jlink
    SEGGER J-Link Commander V6.18c (Compiled Aug 21 2017 16:47:16)
    DLL version V6.18c, compiled Aug 21 2017 16:46:41


    Script file read successfully.
    Processing script file...

    J-Link connection not established yet but required for command.
    Connecting to J-Link via USB...O.K.
    Firmware: J-Link Ultra V4 compiled Oct 6 2017 16:38:09
    Hardware version: V4.00
    S/N: 504400221
    License(s): RDI, FlashBP, FlashDL, JFlash, GDB
    VTref = 3.264V
    Target connection not established yet but required for command.
    Device "RM46L852_EEPROM" selected.


    Connecting to target via JTAG
    J-Link script: InitTarget()
    J-Link script: found RM48L950 rev.A
    TotalIRLen = 10, IRPrint = 0x0011
    JTAG chain detection found 2 devices:
    #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP
    #1 Id: 0x2B95502F, IRLen: 06, TI ICEPick
    ARM AP[0]: 0x44770001, AHB-AP
    ARM AP[1]: 0x24770002, APB-AP
    ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID:04-007BBC14 Cortex-R4
    Found Cortex-R4 r1p3
    6 code breakpoints, 2 data breakpoints
    Debug architecture ARMv7.0
    Data endian: little
    Main ID register: 0x411FC143
    TCM Type register: 0x00010001
    MPU Type register: 0x00000C00
    System control register:
    Instruction endian: little
    Level-1 instruction cache disabled
    Level-1 data cache disabled
    MPU disabled
    Branch prediction enabled
    Cortex-R4 identified.
    Reset delay: 0 ms
    Reset type NORMAL: Toggle reset pin and halt CPU core.
    J-Link script: ResetTarget()

    Downloading file [16bytes.bin]...
    J-Link: Flash download: Bank 0 @ 0x00000000: 1 range affected (16384 bytes)
    J-Link:
    Flash download: Total time needed: 0.342s (Prepare: 0.030s, Compare:
    0.112s, Erase: 0.022s, Program: 0.049s, Verify: 0.119s, Restore: 0.007s)

    ****** Error: Verification failed @ address 0x00000000
    Error while programming flash: Verify failed.

    Reset delay: 0 ms
    Reset type NORMAL: Toggle reset pin and halt CPU core.
    J-Link script: ResetTarget()



    Script processing completed.

    For v6.18c there is expected verification error because of non-existing eeprom programming algos in my sample.
    For v6.20e there is unexpected error: "****** Error: FLASH_CMSIS: The connected CPU core is not supported by this flash module."

    Regards, Vitaliy
    Files

  • Hi Vitaliy,

    We could reproduce this issue and fixed it internally.
    Please find a preliminary version for download here:
    download.segger.com/Niklas/JLink_V621c_Preliminary_OpenFlashloaderAR_Fix.7z

    Could you please give it a try and provide feedback if it works for you?

    Best regards,
    Niklas
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.

  • Hi,

    thanks for the feedback and good to hear that it works for you!

    Best regards,
    Niklas
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.