[SOLVED] J-Trace Pro for Cortex-M and Atmel V71 - No trace

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  • [SOLVED] J-Trace Pro for Cortex-M and Atmel V71 - No trace

    Hi,

    i'm looking into solution to get trace information from Atmel V71 (with Cortex-M7 core). We just bought J-Trace Pro for Cortex-M adapter and using it with Atmel SAM V71 Xplained Ultra Evaluation Kit.
    We are working with IAR ARM 7.60.2, but also tested in uKeil for ARM.

    We not able to get trace data from V71 MCU and we cannot explain why, because IAR ARM shows green ETM button and we able to see ETM CLK by oscilloscope.
    Strange thing is that we did not see ETM trace port mode settings (see Trace.jpg in attach).
    All preparations done by using "Atmel-44045-32-bit-Cortex-M7-Microcontroller-Advanced-Debugging-SAM-V71-V70-E70-S70-MCUs-with-ARM-ETM_App-Note".

    Our IAR ARM log is also you can find in attach.

    I will be appreciate to any help in case of resolving this issue.

    P.S.: I sent a mail to Segger support 2 weeks ago, but still no response.
    Images
    • Trace.jpg

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    • trace_segger_window.jpg

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    Files
    • iar_log.txt

      (3.19 kB, downloaded 802 times, last: )

    The post was edited 2 times, last by Auto ().

  • Hi Forum,


    we answered this issue via Mail.
    There seems one-two issues with Trace on Atmel M7 (e.g. V71, E70, etc...) in general (On device side, not on J-Link side)
    We will provide a Wiki article about this issue in short time.

    Best regards,
    Niklas
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.
  • Hi,

    I am sorry that this issue has been delayed.
    I plan to provide you with a preliminary Version of the J-Link software at the beginning of next week, which supports compensation of wrong timing of trace-data-signals.
    Would it be ok for you to test and provide feedback for this version?

    Best regards,
    Niklas
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.
  • Hi Forum,

    We are currently contacting Atmel / Microchip regarding this issue.

    During investigation, we observe two weird behaviors with V71 series devices:
    1. The Data signal toggles during the rise of the Clock signal
    2. The Data signal only rises to an amplitude of 2.2-2.4V, while the Clock Signal rises to an amplitude of 3.3V

    We (internally) implemented a functionality in the firmware of J-Trace Pro that (partially) compensates for 1), but it unfortunately, since 2) also exist, still only allows better, but not stable and therefore useful tracing of Atmel V71 devices.

    We hope to be able to further improve this with the help of Atmel / Microchip.

    Best regards,
    Niklas
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.
  • Hello,

    I reported this issue a year ago to ARM/Keil. But they are unable to solve this problem until today. So I bought the segger j-trace pro for cortex-m. Same problem like the ulink-pro.
    There are a few more thinks I found.
    1. I bought four SAME70-XPLD demo-boards because atmel told me that the SAMV71-Xplained has layout problems with trace (if you disable the phy it works).
    Two of this demo-boards are able to enter trace mode two not (different chip labeling).
    2. After entering trace mode, trace is running fine if you just use the very small demo-code (if button turn on led). But if I try a more complex code (turn on led after a sec) the cpu jumps to the fault handler after a few cycles.

    I am really happy that know more people trying to solve this bug, but after waiting for more than a year without any result from keil and atmel I think you should not expact to much......

    Regards
  • If they can do this it will be amazing and one more reason to buy more segger devices.
    But if they can't solve this problem and you say it is only a voltage shift, maybe we can do this by our own. Should not be a big deal to shift this signals a little up.
  • Hi,

    The Firmware change that will allow the J-Trace to compensate for wrongly synchronized CLK / DATA Trace signals is currently in development.
    We could not release a preliminary version as a internal concept will be different in the public available versions from the internal version we had running.
    I predict that the firmware update will be available next week, but I can not say it for sure, as the respective developer is out of office today.

    Best regards,
    Niklas
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.
  • Hi,

    with the firmware that ships with V6.11a of the J-Link software & documentation pack (beta) Trace Data Pin Delay can be configured via the J-Trace Pro Webserver:

    In a feature version, it will be possible to use a negative Data Pin Delay, which will result in a delay of the clock pin.


    Atmel said that tracing will work more reliable if the phy is hold in reset or the ETH is soldered off.
    I am currently not allowed to invest more time in experimenting with the Atmel V7x devices, as this is hardware related issue.

    Best regards,
    Niklas
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.
  • Hello Niklas,

    thx for this new firmware.
    I install the software pack, put the phy on the same70 Xplained in reset by connecting the reset pin to gnd, but trace still crash after a few seconds.

    So what do I need to adjust in the J-Trace Pro Webserver?
    And how can I change this parameter if the J-Trace is connected via USB?
  • Hi,

    And how can I change this parameter if the J-Trace is connected via USB?

    Currently not at all. You need to configure it via the webserver and connect J-Trace via Ethernet (Which also the recommend connection type, as streaming data easily exceeds the possible data rate of USB 2.0)

    You would want to set the data pins to a delay of -15, which will give the signal an additional 1.2 ns to get stable.

    Best regards,
    Niklas
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.
  • Hi Forum,

    a quick update on this issue:

    Driving PC10 low in order to halt the Ethernet PHX in reset results in Data trace voltage levels of 3.2V - 3.3V which, in my test case, was sufficient in order to work with Ozone's Instruction Trace without any need to change the delay of the pins.


    Best regards,
    Niklas
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.
  • Dear Niklas,

    im using custom board and Trace lines was connected to trace connector directly (without pull up). I see now 3.3V levels on trace lines.
    I need your recommendations for the trace delays on I/Os.

    Thank you in advance.
  • Hi...i am a new user here. As per my knowledge If they can do this it will be amazing and one more reason to buy more segger devices.But if they can't solve this problem and you say it is only a voltage
    shift, maybe we can do this by our own. Should not be a big deal to
    shift this signals a little up.