[SOLVED] Connection to TMS570LC4357

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  • [SOLVED] Connection to TMS570LC4357

    Hi,

    we have some difficultes to use J-Link with TMS570LC4357 microcontroller. When program flash is empty, it works fine without any problem and here is result of start GDB with command line

    Source Code

    1. "c:\Program Files (x86)\SEGGER\JLink_V510p\JLinkGDBServerCL.exe" -select USB -endian big -if JTAG -device TMS570LC4357ZWT -speed 8000


    Source Code

    1. SEGGER J-Link GDB Server V5.10p Command Line Version
    3. JLinkARM.dll V5.10p (DLL compiled Feb 26 2016 19:04:06)
    5. -----GDB Server start settings-----
    6. GDBInit file: none
    7. GDB Server Listening port: 2331
    8. SWO raw output listening port: 2332
    9. Terminal I/O port: 2333
    10. Accept remote connection: localhost only
    11. Generate logfile: off
    12. Verify download: off
    13. Init regs on start: off
    14. Silent mode: off
    15. Single run mode: off
    16. Target connection timeout: 0 ms
    17. ------J-Link related settings------
    18. J-Link Host interface: USB
    19. J-Link script: none
    20. J-Link settings file: none
    21. ------Target related settings------
    22. Target device: TMS570LC4357ZWT
    23. Target interface: JTAG
    24. Target interface speed: 8000kHz
    25. Target endian: big
    27. Connecting to J-Link...
    28. J-Link is connected.
    29. Firmware: J-Link V9 compiled Feb 2 2016 18:43:46
    30. Hardware: V9.10
    31. S/N: xxxxxxxx
    32. Feature(s): GDB
    33. Checking target voltage...
    34. Target voltage: 3.30 V
    35. Listening on TCP/IP port 2331
    36. Connecting to target...
    37. J-Link found 2 JTAG devices, Total IRLen = 10
    38. JTAG ID: 0x4BA00477 (Cortex-R4)
    39. Connected to target
    40. Waiting for GDB connection...
    Display All


    But problem is connection to chip where running SW. JLInk reset target sucessully, but not catch it and MCU boot normally into SW and GDB server fails like this

    Source Code

    1. SEGGER J-Link GDB Server V5.10p Command Line Version
    3. JLinkARM.dll V5.10p (DLL compiled Feb 26 2016 19:04:06)
    5. -----GDB Server start settings-----
    6. GDBInit file: none
    7. GDB Server Listening port: 2331
    8. SWO raw output listening port: 2332
    9. Terminal I/O port: 2333
    10. Accept remote connection: localhost only
    11. Generate logfile: off
    12. Verify download: off
    13. Init regs on start: off
    14. Silent mode: off
    15. Single run mode: off
    16. Target connection timeout: 0 ms
    17. ------J-Link related settings------
    18. J-Link Host interface: USB
    19. J-Link script: none
    20. J-Link settings file: none
    21. ------Target related settings------
    22. Target device: TMS570LC4357ZWT
    23. Target interface: JTAG
    24. Target interface speed: 8000kHz
    25. Target endian: big
    27. Connecting to J-Link...
    28. J-Link is connected.
    29. Firmware: J-Link V9 compiled Feb 2 2016 18:43:46
    30. Hardware: V9.10
    31. S/N: xxxxxxxx
    32. Feature(s): GDB
    33. Checking target voltage...
    34. Target voltage: 3.29 V
    35. Listening on TCP/IP port 2331
    36. Connecting to target...WARNING: Data and Instruction endian differ
    37. ERROR: Timeout while reading DCC data
    38. ERROR: Could not connect to target.
    39. Target connection failed. GDBServer will be closed...Restoring target state and closing J-Link connection...
    40. ERROR: Could not start CPU core. (ErrorCode: -1)
    41. Shutting down...
    42. Could not connect to target.
    43. Please check power, connection and settings.
    Display All


    Ugly and unreliable work arround is reset MCU manually by nRST signal (pin B17) and hold this signal manually till showing line "Connecting to target...".
    I am able repeat this behavior on two pieces of JLink, any version of SW with support of this MCU (minimally 5.02a, 5.02f, 5.10j, 5.10p, 5.11d) and many types of HW. One of this is TI HDK board. (schematics http://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=spnr043&fileType=zip ) But our different HW have same behavior.

    Any idea? For example write JLinkScript file? How? It looks like I need change reset sequence and/or type.
    I am sure, that problem is on JLink, because SignalDigital XDS200 on same JTAG connector works fine.

    PS: why JLink detect MCU core like Cortex-R4?

    The post was edited 2 times, last by jiri.dobry ().

  • Hi,

    could you provide us with a binary for reproduction purposes?
    We have a TMS570LC4357 on a TI Hercules Development Kit (HDK) available here.

    Best regards,
    Niklas
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.

  • Hi,

    I think that I found some more informations. Problem is on the internal watch dog. Our code enable this watch dog early as is possible during boot.
    Here is code used on demontration. This user code works without problem:

    C Source Code

    1. void main(void)
    2. {
    3. for (;;)
    4. {
    5. }
    6. }


    And this code not

    C Source Code

    1. void main(void)
    2. {
    3. watchDogInit(50u); // 50ms
    4. for (;;)
    5. {
    6. watchDogRefresh();
    7. }
    8. }


    Minimalistic binary to demonstrate problem you can found in attachment. After you will flash this into TI HDK TMS570LC4357, you will able to connect only with on-board XDS100v2 JTAG and TI Uniflash SW.

    Best regards,
    Jiri
    Files

    The post was edited 2 times, last by jiri.dobry ().

  • Hi Jiri,

    Thanks for providing a reproduction binary.
    I could reproduce this issue.
    We will update this thread as soon as a fixed version of the J-Link software & documentation pack is available.

    Best regards,
    Niklas
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.

  • Hi Jiri,

    sorry about the delay in response.
    There will be an update of this thread later this week.

    Best regards,
    Niklas
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.

  • Not sure if there is any fix needed from our side.
    If enabling the watchdog inhibits connecting to the target, I assume the following is the case:
    The watchdog also resets the debug logic of the device, not really good but basically works.
    However, it seems that when J-Link halts the CPU, the watchdog continues running => User configuration mistake

    I am sure, that problem is on JLink, because SignalDigital XDS200 on same JTAG connector works fine.

    I assume that you are using it in TI CCS. So, there are probably some scripts etc. from CCS executed, that reconfigure the watchdog to also halt, when the CPU is halted.


    Best regards
    Alex
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.