[SOLVED] DEBUGGING doesn't work in external RAM, but in internal RAM

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  • [SOLVED] DEBUGGING doesn't work in external RAM, but in internal RAM

    Hello,

    I just start with SEEGER probe.

    I 've configured a EClipse project which works on Internal RAM (set a beakpoint, step into functions, etc.. everything is fine).
    So now I load my code in the external RAM.

    - when I run my application without setting any breakpoints, everything works.
    - when i set a breakpoint, application stops but "counter program" seems freeze after that.



    [img]C:\Users\pca\Pictures\pb_seeger_in_ram.PNG[/img]
    here is my JILINK script for cortexM4 : iMX6SoloX_Connect_CortexM4.JLinkScript.txt

    Is there specials commands to make DEBUG in external RAM of M4 ?

    Thanks a lot for your replies.

    The post was edited 1 time, last by pca ().

  • Hi,


    sorry for the delay in response.
    Are you using an evaluation board or custom hardware?
    If you are using an evaluation board, which one do you use?
    Could you provide us with your project (or a stripped down version) for reproduction purposes?

    Best regards,
    Niklas
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.
  • DEBUGGING doesn't work in external RAM, but in internal RAM

    Hello Niklas,

    Thanks a lot for your reply.

    I'm busy too, so I just can reply now.

    Yes I use an evaluation board , it is the Imx6 Solox SABRE SD.

    You can find attached a ZIP file which contains my project (EClipse based). test_mqx.zip

    I also attached the files "ram.ld" I use to run on "internal ram" or "external ram" (this case doesn't work), respectively "ram_int.ld" and "ram_ext.ld".

    ram_ext.ld.txt ram_int.ld.txt

    Before building my project I copy this file to

    C:\Freescale\Freescale_MQX_4_1_IMX6SX\lib\imx6sx_sdb_m4.gcc_arm\debug\bsp\ram.ld according to the build (internal or external RAM).


    I hope it can help you ...

    Thank you very much for your help
  • Hi,

    Is there specials commands to make DEBUG in external RAM of M4 ?

    I just checked with my colleagues, it should work without any further configuration.

    Could you please provide us with an "out of the box" project, that we can use to reproduce the issue using J-Link Commander / J-Link Debugger?

    Best regards,
    Niklas
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.
  • Hi,


    please abstain from sending me personal messages, as other SEGGER employees are also monitoring this forum but not my PMs.
    If I get ill / go on vacation etc you still want to get answers to your question i suppose :)

    With the term "out of the box project" I was referring to a project (or maybe a binary is sufficient) that I can use with J-Link Commander / J-Link Debugger without using Eclipse and downloading and compiling the NXP SDK(I could not find the version you are using either).


    Best regards,
    Niklas
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.
  • Hi,


    sorry for the delay in response.
    Embedded World 2016 is starting tomorrow and some preparation had to be finished last week.

    You sent us a binary for the Cortex-M4 core, but afaik the M4 cannot run on its own, instead, the A-9 needs to be running an unlock the M4, then the M4 can be used.
    Am i wrong about that?
    If so, can you give me instructions on how to get your application running, starting with an erased device?


    Best regards,
    Niklas
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.
  • Hi,

    Yes, excuse me...

    I attached a file imx6sx_sdb_m4_ram_int.bin which runs on internal RAM.

    I suppose UBoot is on the board, here is the commands to start M4 with this app :


    Source Code

    1. => tftpboot 0x00900000 192.168.64.111:imx6sx_sdb_m4_ram_int.bin
    2. => dcache off
    3. => bootaux 0x00900000


    where :


    • 0x00900000 is the internal start RAM adress
    • 192.168.64.111 is the TFTPBOOT server
    • imx6sx_sdb_m4_ram_int.bin is the file to load

    I hope this can help you.

    Thanks.
  • Hi,

    sorry again for the delay in response.
    I was finally able to reproduce your setup, but I did not encounter any issues during the debug session.
    Breakpoint example:


    Best regards,
    Niklas
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.
  • Hello Niklas,

    Excuse me for delay...

    I was in holidays... :)


    Now i can respond to your email :

    I see in the picture that you can set a breakpoint and be halted on it.

    Yes me too.... ;)

    But are you able to make a single step ? that is the problem. When I want to do a step, the PC register don't move ...

    Thanks a lot for your reply.
  • Hi,

    I hope you had a great holiday.
    Stepping worked for me, I will add a screenshot tomorrow with additional information.

    Best regards,
    Niklas
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.
  • Hi,


    This is what i did in Yocto:


    And here is a screenshot of stepping from 0x81000000


    Best regards,
    Niklas
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.
  • Hello Niklas,

    Thank you for your reply.

    I've made exactly the same things than you, and I obtain exactly the same result ...

    But when I make test with a program running in "internal RAM", I can set a breakpoint, stop on it, make steps and GO. THe program stops correctly.

    I make the test with "JLINK commander" and also "JLINK debugger, here is some pictures :






    But when I make the testwith a program running in "external RAM", I can set a breakpoint but never stop on it. I can make a HALT, then steps correctly, but when I make a GO, the program never stop ... here are some pictures :


    It seems that the breakpoint is correctly saw when its implementation is "HARD", but never saw when its implementation is "RAM" ...

    Have you got an idea ?

    I've also seen this URL segger.com/jlink-unlimited-flash-breakpoints.html

    this link discuss about external FLASH, is it also the case in external RAM ??

    I understand that we have to purchase a probe with the "Unlimited Flash Breakpoint" license, ....

    here is the log for our probe features: RDI, FlashBP, FlashDL, JFlash, GDB

    Is it in uff ??


    Thanks a lot...

    The post was edited 1 time, last by pca ().

  • Hi ,


    your J-Link already includes an unlimited Flash Breakpoints License. ("FlashBP")
    Breakpoints in RAM are not limited.

    It appears to me, that you never halt on this breakpoint because this instruction is not reached during execution.

    You could try the following:
    • Step some time, note an instruction address that is executed
    • Reset to the beginning ("r" and "setpc" if necessary
    • Set a BP to the noted address
    • g
    • h
    Best regards,
    Niklas
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.
  • Niklas,

    I have set the breakpoint exactly at the same place (both in internal or external RAM) ...

    So I'm sure the program pass on this.

    My conclusion is the following :

    - Breakpoints are not seen in external RAM.

    But Why ??? ?(
  • Hi,


    I cannot confirm this.
    Could you please give it a try?
    As an alternative :
    • setbp on any valid address
    • g (important in order to let J-Link set the breakpoint)
    • setpc on the address with the BP
    • s
    In case this fails, could you do a ReadMEM (mem32) on the breakpoint address?

    Best regards,
    Niklas
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.
  • Niklas,

    I 've again make a test.

    1) run the program
    2) connect with JLINK commander
    3) halt program
    4) do some steps and set a breakpoint at 0x81004FF6
    5) make a GO
    6) the program STOP and unbelievable it stop on the good address !!!
    7) then i make some steps again
    8) and the PC regsiter don't move :cursing: :cursing:

    here is a log of my JLINK commander

    Source Code

    1. SEGGER J-Link Commander V5.10r (Compiled Mar 8 2016 17:35:19)
    2. DLL version V5.10r, compiled Mar 8 2016 17:34:46
    3. Connecting to J-Link via USB...O.K.
    4. Firmware: J-Link V10 compiled Mar 8 2016 11:13:10
    5. Hardware version: V10.00
    6. S/N: 600001141
    7. License(s): RDI, FlashBP, FlashDL, JFlash, GDB
    8. Emulator has Trace capability
    9. VTref = 3.309V
    10. Type "connect" to establish a target connection, '?' for help
    11. J-Link>connect
    12. Please specify device / core. <Default>: CORTEX-M4
    13. Type '?' for selection dialog
    14. Device>
    15. Please specify target interface:
    16. J) JTAG (Default)
    17. S) SWD
    18. TIF>
    19. Device position in JTAG chain (IRPre,DRPre) <Default>: -1,-1 => Auto-detect
    20. JTAGConf>
    21. Specify target interface speed [kHz]. <Default>: 4000 kHz
    22. Speed>
    23. Device "CORTEX-M4" selected.
    24. TotalIRLen = 17, IRPrint = 0x001011
    25. **************************
    26. WARNING: At least one of the connected devices is not JTAG compliant (IEEE Std 1
    27. 149.1, 7.1.1.d, IR-cells). (NumDevices = 4, NumBitsSet = 3)
    28. **************************
    29. Found Cortex-M4 r0p1, Little endian.
    30. FPUnit: 6 code (BP) slots and 2 literal slots
    31. CoreSight components:
    32. ROMTbl 0 @ E00FF000
    33. ROMTbl 0 [0]: FFF0F000, CID: B105E00D, PID: 000BB00C SCS
    34. ROMTbl 0 [1]: FFF02000, CID: B105E00D, PID: 003BB002 DWT
    35. ROMTbl 0 [2]: FFF03000, CID: B105E00D, PID: 002BB003 FPB
    36. ROMTbl 0 [3]: FFF01000, CID: B105E00D, PID: 003BB001 ITM
    37. ROMTbl 0 [4]: FFF41000, CID: B105900D, PID: 000BB9A1 TPIU
    38. ROMTbl 0 [5]: FFF42000, CID: B105900D, PID: 000BB925 ETM
    39. ROMTbl 0 [6]: FFF43000, CID: B105900D, PID: 003BB907 ETB
    40. ROMTbl 0 [7]: FFF44000, CID: B105900D, PID: 001BB908 CSTF
    41. Found 4 JTAG devices, Total IRLen = 17:
    42. #0 Id: 0x4BA00477, IRLen: 04, IRPrint: 0x1, CoreSight JTAG-DP (ARM)
    43. #1 Id: 0x4BA00477, IRLen: 04, IRPrint: 0x1, CoreSight JTAG-DP (ARM)
    44. #2 Id: 0x00000001
    45. #3 Id: 0x0891C01D
    46. Cortex-M4 identified.
    47. J-Link>h
    48. PC = 81007A2C, CycleCnt = 89036EDE
    49. R0 = 00000000, R1 = 00000328, R2 = 00000000, R3 = 00000000
    50. R4 = 00000000, R5 = 00000000, R6 = 00000000, R7 = 20002828
    51. R8 = 00000000, R9 = 00000000, R10= 00000000, R11= 00000000
    52. R12= 00000000
    53. SP(R13)= 20002828, MSP= 20001820, PSP= 20002828, R14(LR) = 8100D4AB
    54. XPSR = 81000000: APSR = Nzcvq, EPSR = 01000000, IPSR = 000 (NoException)
    55. CFBP = 02000000, CONTROL = 02, FAULTMASK = 00, BASEPRI = 00, PRIMASK = 00
    56. FPS0 = 00000000, FPS1 = 00000000, FPS2 = 00000000, FPS3 = 00000000
    57. FPS4 = 00000000, FPS5 = 00000000, FPS6 = 00000000, FPS7 = 00000000
    58. FPS8 = 00000000, FPS9 = 00000000, FPS10= 00000000, FPS11= 00000000
    59. FPS12= 00000000, FPS13= 00000000, FPS14= 00000000, FPS15= 00000000
    60. FPS16= 00000000, FPS17= 00000000, FPS18= 00000000, FPS19= 00000000
    61. FPS20= 00000000, FPS21= 00000000, FPS22= 00000000, FPS23= 00000000
    62. FPS24= 00000000, FPS25= 00000000, FPS26= 00000000, FPS27= 00000000
    63. FPS28= 00000000, FPS29= 00000000, FPS30= 00000000, FPS31= 00000000
    64. FPSCR= 00000000
    65. J-Link>s
    66. 81007A2C: 11 E0 B #+0x22
    67. J-Link>s
    68. 81007A52: 80 BD POP {R7,PC}
    69. J-Link>s
    70. 8100504A: D4 E7 B #-0x58
    71. J-Link>s
    72. 81004FF6: FB 68 LDR R3, [R7, #+0x0C]
    73. J-Link>s
    74. 81004FF8: D3 F8 30 23 LDR R2, [R3, #+0x330]
    75. J-Link>s
    76. 81004FFC: 01 32 ADD R2, #1
    77. J-Link>setBP 0x81004FF6
    78. Breakpoint set @ addr 0x81004FF6 (Handle = 1)
    79. J-Link>s
    80. 81004FFE: C3 F8 30 23 STR R2, [R3, #+0x330]
    81. J-Link>s
    82. 81005002: D3 F8 30 33 LDR R3, [R3, #+0x330]
    83. J-Link>s
    84. 81005006: 00 2B CMP R3, #0
    85. J-Link>s
    86. 81005008: 19 D1 BNE #+0x32
    87. J-Link>s
    88. 8100503E: 7B 68 LDR R3, [R7, #+0x04]
    89. J-Link>s
    90. 81005040: 00 2B CMP R3, #0
    91. J-Link>s
    92. 81005042: 00 D0 BEQ #+0x00
    93. J-Link>s
    94. 81005046: 02 F0 E9 FC BL #+0x29D2
    95. J-Link>s
    96. 81007A1C: 80 B5 PUSH {R7,LR}
    97. J-Link>s
    98. 81007A1E: 00 AF ADD R7, SP, #0
    99. J-Link>s
    100. 81007A20: 02 F0 12 F9 BL #+0x2224
    101. J-Link>s
    102. 81009C48: 80 B5 PUSH {R7,LR}
    103. J-Link>s
    104. 81009C4A: 00 AF ADD R7, SP, #0
    105. J-Link>s
    106. 81009C4C: 00 F0 78 FE BL #+0xCF0
    107. J-Link>s
    108. 8100A940: 80 B5 PUSH {R7,LR}
    109. J-Link>s
    110. 8100A942: 00 AF ADD R7, SP, #0
    111. J-Link>s
    112. 8100A944: 02 F0 02 FE BL #+0x2C04
    113. J-Link>s
    114. 8100D54C: 80 B5 PUSH {R7,LR}
    115. J-Link>s
    116. 8100D54E: 00 AF ADD R7, SP, #0
    117. J-Link>s
    118. 8100D550: 0C 4B LDR R3, [PC, #+0x30]
    119. J-Link>s
    120. 8100D552: 1B 68 LDR R3, [R3]
    121. J-Link>s
    122. 8100D554: 01 2B CMP R3, #1
    123. J-Link>s
    124. 8100D556: 11 D0 BEQ #+0x22
    125. J-Link>s
    126. 8100D558: FF F7 88 FF BL #-0xF0
    127. J-Link>s
    128. 8100D46C: 80 B5 PUSH {R7,LR}
    129. J-Link>s
    130. 8100D46E: 00 AF ADD R7, SP, #0
    131. J-Link>s
    132. 8100D470: F3 F7 EC FE BL #-0xC228
    133. J-Link>s
    134. 8100124C: 80 B4 PUSH {R7}
    135. J-Link>s
    136. 8100124E: 83 B0 SUB SP, SP, #12
    137. J-Link>s
    138. 81001250: 00 AF ADD R7, SP, #0
    139. J-Link>s
    140. 81001252: 0B 4B LDR R3, [PC, #+0x2C]
    141. J-Link>s
    142. 81001254: 1B 68 LDR R3, [R3]
    143. J-Link>g
    144. J-Link>h
    145. PC = 81004FF6, CycleCnt = 98AB33B4
    146. R0 = 00000000, R1 = 00000328, R2 = 00000000, R3 = 00000000
    147. R4 = 00000000, R5 = 00000000, R6 = 00000000, R7 = 20002830
    148. R8 = 00000000, R9 = 00000000, R10= 00000000, R11= 00000000
    149. R12= 00000000
    150. SP(R13)= 20002830, MSP= 20001820, PSP= 20002830, R14(LR) = 8100D4AB
    151. XPSR = 81000000: APSR = Nzcvq, EPSR = 01000000, IPSR = 000 (NoException)
    152. CFBP = 02000000, CONTROL = 02, FAULTMASK = 00, BASEPRI = 00, PRIMASK = 00
    153. FPS0 = 00000000, FPS1 = 00000000, FPS2 = 00000000, FPS3 = 00000000
    154. FPS4 = 00000000, FPS5 = 00000000, FPS6 = 00000000, FPS7 = 00000000
    155. FPS8 = 00000000, FPS9 = 00000000, FPS10= 00000000, FPS11= 00000000
    156. FPS12= 00000000, FPS13= 00000000, FPS14= 00000000, FPS15= 00000000
    157. FPS16= 00000000, FPS17= 00000000, FPS18= 00000000, FPS19= 00000000
    158. FPS20= 00000000, FPS21= 00000000, FPS22= 00000000, FPS23= 00000000
    159. FPS24= 00000000, FPS25= 00000000, FPS26= 00000000, FPS27= 00000000
    160. FPS28= 00000000, FPS29= 00000000, FPS30= 00000000, FPS31= 00000000
    161. FPSCR= 00000000
    162. J-Link>s
    163. 81004FF6: FB 68 LDR R3, [R7, #+0x0C]
    164. J-Link>s
    165. 81004FF6: FB 68 LDR R3, [R7, #+0x0C]
    166. J-Link>s
    167. 81004FF6: FB 68 LDR R3, [R7, #+0x0C]
    168. J-Link>s
    169. 81004FF6: FB 68 LDR R3, [R7, #+0x0C]
    170. J-Link>s
    171. 81004FF6: FB 68 LDR R3, [R7, #+0x0C]
    172. J-Link>s
    173. 81004FF6: FB 68 LDR R3, [R7, #+0x0C]
    174. J-Link>s
    Display All
  • Niklas,

    here the test result :

    Source Code

    1. J-Link>h
    2. PC = 81007A2C, CycleCnt = 85FB4130
    3. R0 = 00000000, R1 = 00000328, R2 = 00000000, R3 = 00000000
    4. R4 = 00000000, R5 = 00000000, R6 = 00000000, R7 = 20002828
    5. R8 = 00000000, R9 = 00000000, R10= 00000000, R11= 00000000
    6. R12= 00000000
    7. SP(R13)= 20002828, MSP= 20001820, PSP= 20002828, R14(LR) = 8100D4AB
    8. XPSR = 81000000: APSR = Nzcvq, EPSR = 01000000, IPSR = 000 (NoException)
    9. CFBP = 02000000, CONTROL = 02, FAULTMASK = 00, BASEPRI = 00, PRIMASK = 00
    10. FPS0 = 00000000, FPS1 = 00000000, FPS2 = 00000000, FPS3 = 00000000
    11. FPS4 = 00000000, FPS5 = 00000000, FPS6 = 00000000, FPS7 = 00000000
    12. FPS8 = 00000000, FPS9 = 00000000, FPS10= 00000000, FPS11= 00000000
    13. FPS12= 00000000, FPS13= 00000000, FPS14= 00000000, FPS15= 00000000
    14. FPS16= 00000000, FPS17= 00000000, FPS18= 00000000, FPS19= 00000000
    15. FPS20= 00000000, FPS21= 00000000, FPS22= 00000000, FPS23= 00000000
    16. FPS24= 00000000, FPS25= 00000000, FPS26= 00000000, FPS27= 00000000
    17. FPS28= 00000000, FPS29= 00000000, FPS30= 00000000, FPS31= 00000000
    18. FPSCR= 00000000
    19. J-Link>setBP 0x81004FF6
    20. Breakpoint set @ addr 0x81004FF6 (Handle = 1)
    21. J-Link>g
    22. J-Link>setPC 0x81004FF6
    23. J-Link>s
    24. 81004FF6: FB 68 LDR R3, [R7, #+0x0C]
    25. J-Link>s
    26. 81004FF6: FB 68 LDR R3, [R7, #+0x0C]
    27. J-Link>ReadMEM 0x81004FF6
    28. Unknown command. '?' for help.
    29. J-Link>mem32 0x81004FF6
    30. Syntax: mem32 <Addr>, <NumItems>
    31. J-Link>mem32 0x81004FF6, 16
    32. **************************
    33. WARNING: Mis-aligned memory read: Address: 0x81004FF6, NumBytes: 88, Alignment:
    34. 4 (Word-aligned)
    35. **************************
    36. 81004FF6 = F8D368FB 32012330 2330F8C3 3330F8D3
    37. 81005006 = D1192B00 F8D368FB 32012334 2334F8C3
    38. 81005016 = 3334F8D3 D10F2B00 F8D368FB 32012338
    39. 81005026 = 2338F8C3 3338F8D3 D1052B00 F8D368FB
    40. 81005036 = 3201233C 233CF8C3 2B00687B BF30D000
    41. 81005046 = FCE9F002 0000E7D4
    42. J-Link>
    Display All
  • Hello Niklas,

    What about my problem ?

    did you be able to reproduce it on your board ?

    The internal RAM is too small now and I can't debug my application in external RAM. So I'm really interested by your response.

    Regards