PSoCs have a mode where the SWD interface is enabled only in RESET mode; in order to reduce the power consumption.
Cypress call this "SWD in GPIO mode", check in the PSoC Creator IDE under System tab.

However it seems that JLink does not support a connect-under-RESET for PSoC devices.
When in SWD-GPIO mode, JLink can't connect at all, actually it does not even detect the SWD interface.

Trying to change rsettype to 3 returns an UNKNOWN type, and does not solve the problem.

Also, programming the PSoC with Cypress SWD programmer works without problem.

Device used : CYBL10461-56LQXI (PRoC with BLE) / can be tested with Cypress dev boards as well.
JLink version : V510i

Thanks,
Florent

Check for example AN92584 at cypress.com/documentation/appl…timating-battery-life-ble
At page 7/8 : SWD Pin Configuration, they explain how to configure it.

They say that the SWD pins are in GPIO mode normally, but "will still be available for programming the device upon chip reset.".

Florent

Hi Niklas,
this issue is not be related to a specific project.

Just open any sample PSoC BLE project from Cypress in PSoC Creator, make the change SWD > GPIO as stated in AN92584, and that should do it.
Once the PSoC is flashed, JLink won't be able to connect to it again.

Florent

No, you don't need to export the code to another IDE to reproduce the problem. I used only JLink to flash the .hex files and the issue is reproduced.

I tried with BLE_Battery_Level example. Check the attachement. Note that if you don't switch the SWD interface into GPIO mode, the issue is not present.
I also attached the .hex file with SWD in GPIO mode, you can also generate it with the IDE (in CortexM0\ARM_GCC_493\Debug\BLE_Battery_Level.hex).

I use the Cypress BLE Pionneer Kit, and I use the black daughter board (PRoC / CYBL10563), but the bug has been reproduced with other boards / devices as well (CYBL10461).
In JLink Commander : device CYBL10XXX, then I manually select SWD interface at default speed.
You can erase / loadfile BLE_Battery_Level.hex, but once done, JLink is unable to re-connect :
- directly on the Pionneer Kit board, it displays "WARNING: RESET (pin 15) high but should be low" and then ultimately "Can not connect to target".
- using the daughter board directly connected to JLink with some wires, when trying "connect" it just displays "Can not connect to target". With an oscilloscope we can see that JLink switches RESET pin high / low / high / low serveral times but that doesn't help. I think you need to have the RESET pin being low for some time before the SWD interface is enabled (and obviously if at any time during connecting JLink switch the RESET to high, the SWD interface will be disabled immediately).
- typing r0 in JLink Commander does switch RESET to low, but as soon as we try "connect", JLink switches the RESET pin back to high , which disables the SWD interface and prevents JLink from connecting.

As JLink can't be used anymore, you need to use the Cypress SWD Programmed (integrated on the Cypress BLE Pionneer Kit main board) to flash the MCU again.

Florent

Hi Niklas,
thanks, the issue seems to be fixed on 5.10p!

Florent