Hi,
I am having trouble resetting a CC2650 Ti chip with an CortexM3 Core. Jlink recognized the device, However when trying to reset the cpu I Get an error.The firmware running on the chip could be setting it low-power mode on startup which disables debug, however this issue should be solved in V5.02b ([SOLVED] CC2650 JLinkExe connection issue).
I am using the latest version of Jlink.
Hope you can help me with this issue. The error that I get is posted here:
user@instant-contiki:~/contiki/examples/er-rest-example$ JLinkExe
SEGGER J-Link Commander V5.02k ('?' for help)
Compiled Nov 13 2015 18:34:05
DLL version V5.02k, compiled Nov 13 2015 18:34:01
Firmware: J-Link V9 compiled Oct 9 2015 20:34:47
Hardware: V9.30
S/N: 59305485
Feature(s): GDB
Emulator has Trace capability
VTarget = 2.682V
Info: Could not measure total IR len. TDO is constant high.
Info: Could not measure total IR len. TDO is constant high.
No devices found on JTAG chain. Trying to find device on SWD.
No device found on SWD.
Trying to find device on FINE interface.
No device found on FINE interface.
Did not find any core.
Failed to identify target. Trying again with slow (4 kHz) speed.
No devices found on JTAG chain. Trying to find device on SWD.
No device found on SWD.
Trying to find device on FINE interface.
No device found on FINE interface.
Did not find any core.
No device found at all. Selecting JTAG as default target interface.
J-Link>device CC2650F128
Info: Device "CC2650F128" selected.
Reconnecting to target...
Info: TotalIRLen = 10, IRPrint = 0x0011
Info: Found Cortex-M3 r2p1, Little endian.
Info: FPUnit: 6 code (BP) slots and 2 literal slots
Info: CoreSight components:
Info: ROMTbl 0 @ E00FF000
Info: ROMTbl 0 [0]: FFF0F000, CID: B105E00D, PID: 000BB000 SCS
Info: ROMTbl 0 [1]: FFF02000, CID: B105E00D, PID: 003BB002 DWT
Info: ROMTbl 0 [2]: FFF03000, CID: B105E00D, PID: 002BB003 FPB
Info: ROMTbl 0 [3]: FFF01000, CID: B105E00D, PID: 003BB001 ITM
Info: ROMTbl 0 [4]: FFF41000, CID: B105900D, PID: 003BB923 TPIU-Lite
J-Link>r
Reset delay: 0 ms
Reset type NORMAL: Resets core & peripherals via SYSRESETREQ & VECTRESET bit.
Info: SYSRESETREQ has confused core. Trying to reconnect and use VECTRESET.
**************************
WARNING: Failed to reset CPU. VECTRESET has confused core.
**************************
**************************
WARNING: CPU did not halt after reset.
**************************
**************************
WARNING: CPU could not be halted
**************************
Info: Core is locked-up, trying to disable WDT.
**************************
WARNING: CPU did not halt after reset.
**************************
**************************
WARNING: T-bit of XPSR is 0 but should be 1. Changed to 1.
**************************
**************************
WARNING: CPU did not halt after reset.
**************************
**************************
WARNING: T-bit of XPSR is 0 but should be 1. Changed to 1.
**************************
**************************
WARNING: S_RESET_ST not cleared
**************************
****** Error: Bad JTAG communication: Write to IR: Expected 0x1, got 0x0 (TAP Command : 10) @ Off 0x5.
Error while identifying Cortex-M device. Wrong AHB ID. Expected 0x04770001, found 0x00000000
J-Link>
I am having trouble resetting a CC2650 Ti chip with an CortexM3 Core. Jlink recognized the device, However when trying to reset the cpu I Get an error.The firmware running on the chip could be setting it low-power mode on startup which disables debug, however this issue should be solved in V5.02b ([SOLVED] CC2650 JLinkExe connection issue).
I am using the latest version of Jlink.
Hope you can help me with this issue. The error that I get is posted here:
user@instant-contiki:~/contiki/examples/er-rest-example$ JLinkExe
SEGGER J-Link Commander V5.02k ('?' for help)
Compiled Nov 13 2015 18:34:05
DLL version V5.02k, compiled Nov 13 2015 18:34:01
Firmware: J-Link V9 compiled Oct 9 2015 20:34:47
Hardware: V9.30
S/N: 59305485
Feature(s): GDB
Emulator has Trace capability
VTarget = 2.682V
Info: Could not measure total IR len. TDO is constant high.
Info: Could not measure total IR len. TDO is constant high.
No devices found on JTAG chain. Trying to find device on SWD.
No device found on SWD.
Trying to find device on FINE interface.
No device found on FINE interface.
Did not find any core.
Failed to identify target. Trying again with slow (4 kHz) speed.
No devices found on JTAG chain. Trying to find device on SWD.
No device found on SWD.
Trying to find device on FINE interface.
No device found on FINE interface.
Did not find any core.
No device found at all. Selecting JTAG as default target interface.
J-Link>device CC2650F128
Info: Device "CC2650F128" selected.
Reconnecting to target...
Info: TotalIRLen = 10, IRPrint = 0x0011
Info: Found Cortex-M3 r2p1, Little endian.
Info: FPUnit: 6 code (BP) slots and 2 literal slots
Info: CoreSight components:
Info: ROMTbl 0 @ E00FF000
Info: ROMTbl 0 [0]: FFF0F000, CID: B105E00D, PID: 000BB000 SCS
Info: ROMTbl 0 [1]: FFF02000, CID: B105E00D, PID: 003BB002 DWT
Info: ROMTbl 0 [2]: FFF03000, CID: B105E00D, PID: 002BB003 FPB
Info: ROMTbl 0 [3]: FFF01000, CID: B105E00D, PID: 003BB001 ITM
Info: ROMTbl 0 [4]: FFF41000, CID: B105900D, PID: 003BB923 TPIU-Lite
J-Link>r
Reset delay: 0 ms
Reset type NORMAL: Resets core & peripherals via SYSRESETREQ & VECTRESET bit.
Info: SYSRESETREQ has confused core. Trying to reconnect and use VECTRESET.
**************************
WARNING: Failed to reset CPU. VECTRESET has confused core.
**************************
**************************
WARNING: CPU did not halt after reset.
**************************
**************************
WARNING: CPU could not be halted
**************************
Info: Core is locked-up, trying to disable WDT.
**************************
WARNING: CPU did not halt after reset.
**************************
**************************
WARNING: T-bit of XPSR is 0 but should be 1. Changed to 1.
**************************
**************************
WARNING: CPU did not halt after reset.
**************************
**************************
WARNING: T-bit of XPSR is 0 but should be 1. Changed to 1.
**************************
**************************
WARNING: S_RESET_ST not cleared
**************************
****** Error: Bad JTAG communication: Write to IR: Expected 0x1, got 0x0 (TAP Command : 10) @ Off 0x5.
Error while identifying Cortex-M device. Wrong AHB ID. Expected 0x04770001, found 0x00000000
J-Link>