Unable to halt arm core on STR7

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  • Unable to halt arm core on STR7


    I'm working on STR7 using IAR and Jlink. Sometimes, the ARM core doesn't answer. The Jlink says "unable to halt ARM core". I can't get back my CPU after reset, RAM boot etc... I've tried everything according IAR or segger recommandations. I've installed the latest version of JLINK driver, but without any success.

    When it happens, the only solution I've for the moment is to remove the chipset and replace it...expensive.... Do you have any idea how to get back control on the ARM core ?

    Thanks for your help,

  • Unable to halt ARM core

    Hi Oliver,

    I use flash configuration. Indeed, I need a lot of RAM memory for my program. I have a filesystem installed in the RAM (32kb). I also use 12 kb of RAM as buffers for USB transfert. In this case, I'm not sure to be able to run in RAM configuration ? Is it correct ?

    Anyway, I noticed that the "unable to halt ARM core" case happens when I upload, "by accident", a program with wrong memory mapping (the linker file). The question is then : Is there a solution to get back control on the ARM7 when it's locked as it seems to be in my case ? (Especially for my demo-board)

    Thanks for your support,

  • Open the project options of your RAM configuration and click "Linker" from the left hand menu.
    Switch to the "List" tab and ensure the "Generate linker listing" and "Module summary" checkboxes are checked.
    Compile your RAM project, IAR will generate a .lst file which can be found in the file tree with the same looking name as the executable.
    Open it and scroll to the end of the file, there will be a total summary of how much space your program needs.

    Best regards,
  • Soft Unlock STR7

    If the STR7 Flash is software locked you can make use of the J-Flash utility to soft unlock it. There are two options to soft unlock this. You can set the Global Options to Automatically unlock sectors if necessary. Or you can modify the Flash by navigating to the Target|Lock/Unlock sectors menu option.
  • Unable to halt ARM core

    Thanks for your answers,

    I will try to debug in RAM in the future as you advise.

    Regarding the Jlink tool, I've tested it but without success. In the J-Flash ARM tool, I select the "automatically unlock sectors if necessary" on all sector. I cannot halt the core anyway.

  • Hi Greg,

    There are several reasons why the CPU core can not be halted.
    Either the memory wait signal of the core is still enabled or CPU disables the clock (wrong PLL clock settings/CPU enters power-save mode).
    Therefore the core cannot communicate via JTAG.
    The only way to gain control of the core via JTAG is to reset it and halt it immediately.
    BTW: Which STR7xx are you using?
    Could you please do the following:
    • Start the J-Link commander (JLink.exe)
    • Set a very high JTAG-speed by typing "speed [speed in kHz], for example "speed 8000" and press enter. If you are using a STR75x core - a TDMI-S core, this may not work.
    • Now type "rx 0" - This will reset the core as quickly as possible. The higher the speed the earlier the core is stopped.
      You should see:
      Reset delay: 0 ms
      Reset type NORMAL: Using RESET pin, halting CPU after Reset
      Info: Resetting target using RESET pin
    • The core is halted after reset. Type "regs" to see the CPU registers:
      PC: (R15) = 00000000, CPSR = 000000D3 (SVC mode, ARM FIQ dis. IRQ dis.)
      R0 = A0000054, R1 = 00008040, R2 = 00000000, R3 = 20000004
      R4 = 000000E1, R5 = 000000C7, R6 = 0000004D, R7 = 000000BD
      USR: R8 =00000000, R9 =00000000, R10=00000001, R11 =00000001, R12 =00000099
      R13=200007FC, R14=000000C7
      FIQ: R8 =00000000, R9 =00000000, R10=00000000, R11 =00000000, R12 =00000000
      R13=04000000, R14=00000000, SPSR=C00000FF
      SVC: R13=00000000, R14=000000F4, SPSR=000000FF
      ABT: R13=00000000, R14=00000000, SPSR=D000005F
      IRQ: R13=20000900, R14=00000000, SPSR=F00000F7
      UND: R13=00000000, R14=00000000, SPSR=D000007A
    • If you can see the registers' contents, the next step will be to erase the contents of the flash. Use J-Flash and set the following settings:
      • JTAG\JTAG speed before/after init to 8000kHz (or the value you tried with J-Link commander)
      • CPU\Init sequence: Action type: Reset, Type: 0, Delay: 0ms
    • Now connect to the target and select "Erase chip" to erase the flash contents.
    Let me know if this helps.