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  • Hello Russ, To stay up to date with our releases we suggest subscribing to our update notification list: segger.com/notification/subscribe.php?prodid=178,7 This thread will be closed now. Best regards, Nino

  • Hello Russ, Quote from schmalr: “I am simply exploring what we will be able to do (and how) in the future when we have our custom ASIC (which is under development). ” Depending on how your devices implements the trace pins you will most likely need to enable and configure them in some way. This can be done in a JLinkScript: wiki.segger.com/How_to_configu…t_files_to_enable_tracing Quote from schmalr: “We will (eventually) be performing automated overnight testing. I would like to be able to recor…

  • Hello, We are using this board: ti.com/tool/TMDS570LS31HDK With a TMS57043 on it. Quote from tpmeier: “I just attempted connecting to my devboard again, and managed to get it working this time around. Maybe I connected something wrong the first time? I'm going to go through the schematic for the devboard and see if I can find any new insights. ” Are you using the original SEGGER USB cable and JTAG cable? On the eval board you are using there is a on board debugger which might interfere with exte…

  • Hello, Yes that board should work. But you would probably need to use a "flying wire" setup which will no yield high trace clock speeds due to interference. To reach maximum trace clock a proper Trace debug header connection is required. We will try to get our hands on that eval board as well so we can create an example project for that target device as well. We will inform you once we have the board and project ready. In the meantime you could try to set up the target specific trace setup yours…

  • Hi, Thank you for your inquiry. What is the S/N of your J-Link Edu? We tried to reproduce the issue with a J-Link V10 that we have here (same hardware as Edu) and everything was working fine on an TMS570LS043 Hercules Developement Kit. Are you using custom hardware or an eval board? Could you compare the Hercules devi kit board with your design and see if there are any differences on how the JTAG connection is set up on the board? Best regards, Nino

  • Hello Russ, Thank you for your inquiry. Not sure if we understand your setup correctly. So you are tracing via pins and are using Ozone. Correct? Which target device are you tracing? You now want to dump the instruction trace data into a local file and load it after ending the debug session in Ozone for post analysis? If you answered that question with yes then we can inform you about the great news that exactly that feature will be part of our next big J-Trace PRO feature extension planned for …

  • Hello Michael, Thank you for your inquiry. RTT is currently only available for Arm Cortex-M and some Renesas RX cores: segger.com/products/debug-prob…about-real-time-transfer/ The prerequisite is that the core type supports background memory access which is not the case with pic32. Best regards, Nino

  • Hello Thomas, Thank you for your inquiry. Quote from thomask77: “Is there already support for this mode in the J-Link / Ozone? ” Not yet for the STM32H7 series as ST choose a very non standard implementation here which means a bit of rework in our software to support such a constellation. Quote from thomask77: “Is it planned? ” It is on our customer wish list with no fixed time schedule or priority due to low demand and the more advanced possibilities of ETM trace which already works. We will se…

  • Hello, To be able to use this function you need to set RTTTelnetAllowNonLocalClient before the J-Link DLL is loaded. This is currently only possible with the J-Link SDK where you can write your own Application. More information about the SDK can be found here: segger.com/products/debug-prob…nk/technology/j-link-sdk/ We will improve the J-Link documentation accordingly so it becomes more clear. Best regards, Nino

  • Hello, It is available with the latest J-Link software version V6.40. Best regards, Nino

  • Hello Russ, Thank you for providing reproduction steps. With them the issue was reproducible but only if SEGGER Linker was used. It did not matter for us if gcc or clang was used as compiler. We are currently working on a fix which should be available with the next ES update. For now we suggest using the gcc linker if you need stack usage in your projects right now. To stay up to date with ES releases we recommend subscribing to our update notification mailinglist: segger.com/notification/subscr…

  • Hello, Great to hear that you are up and running again. This thread will be closed now. Best regards, Nino

  • Hello, Please understand that without being able to reproduce the issue we only can guess. To make things easier could you provide us with the following? Quote from SEGGER - Nino: “Generally to be able to find the source of such issues we suggest the following steps: 1. Send the Crash Report if prompted + giving details about the situation, why when where it happened. 2. Send us the backed up settings.xml 3. Go to Help->Create Support Report and send that file as well. ” Best regards, Nino

  • Hello, Thank you for your inquiry. 1: This will be improved with the next SystemView release version. 2: In the Event view window you can already set references and measure the time between them. For timeline this is not added yet but might come in future versions. 3: The timestamp calculation gets incorrect at that point as a Systick gets pending status but Cycle counter is not incremented yet. Thus a gap can happen when calculationg the timestamp if this change is not handled correctly. A hand…

  • Hello, Yes, enabling external RTT clients is supported. You can use J-Link command string RTTTelnetAllowNonLocalClient for that. More information can be found in the latest J-Link user guide UM08001. Best regards, Nino

  • Hello, Thank you for your inquiry. To use a batch file with the J-LinkSTR91 Commander you can use CL options -CommanderScript or -CommandFile. How to use them is explained in the J-Link user guide UM08001 in section 3.2.3. Best regards, Nino

  • Hello, The manual is a bit moot at that point you cited. The clock tree in the manual is accurate though so you can orient on that. In register PLL1DIVR the DIVR1 divides down the trace clock. In the 400 MHz eval sample it shifts 5 << 24 to achieve a /6 divider, default is /2 at that point. So you got 25 MHz(HSE)/5*160/6 = pll1_r_ck This reaches TPIU and is 133 MHz. In DDR fashion this outputs with 66 MHz. You can measure the trace clock in the J-Trace PRO web interface or in the J-Link Control …

  • Hello, Thank you for your inquiry. We will try to reproduce the reported behaviour and fix it if possible. Sorry for any inconveniences caused. Best regards, Nino

  • Hello, Quote from Gossamer: “I would rather have my own project template then to use generic ones..as I have more control on how wizard creates the skeleton application for me. I would appreciate help in creating a template, well to fix these issues I have. ” Please understand that we can't assist you in this matter as this would exceed regular support. Best regards, Nino

  • Hello, Generally tracing should be working with the S5D9 device series. The target device implements an ETM and TPIU which should be sufficient. However we could not find an evalboard that has a trace debug header available with trace pins connected to them. If you could point us to an eval board we can try to get our hands on such a board and add it to tested devices as well with an example project. What should work out-of-the-box already is ETB trace. For this simply create an Ozone project an…