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Quote from SEGGER - Erik: “Right now, we had no inquiry regarding the points you mentioned ” The OP here is just such an enquiry - (s)he asked if using the VCOM meant (s)he didn't have to use a UART on the target!

There was another thread about this, but it's now been closed: Quote from SEGGER - Nino: “A Call Hierarchy is currently not available in Embedded Studio debugger. We will put it on our wish list so it might be available with a future version of ES ” But the question was not about the debugger! The request was to have a call Hierarchy in the main SES development windows - like Eclipse does. So please can we also have that added to the Wish List? Quote: “Alternatively you could use our stand alone…

Quote from SEGGER - Erik: “For further / detailed information regarding VCOM, please refer to the following wiki-article: wiki.segger.com/Using_J-Link_VCOM_functionality ” That's the article I linked earlier! It really doesn't answer my questions: - It focuses entirely on the host end - It's not at all clear how the feature is actually used at the Target end; - It's not very clear that you still have full use of SWD debug; - It says nothing about JTAG.

Oh, I see - it's here: forum.segger.com/index.php/Att…de51d97719089a2ac35512574 So you just connect it to the Target's hardware UART pins. Which answers the OP question: Quote from DUrbano: “I'm wondering if I use it as a debug UART for my firmware instead of use a hw UART from mcu ” No - you can't do that. That page says you can't do JTAG simultaneously (because it steals one of the pins) - but, presumably, you can still do SWD debugging ?

Neither the Wiki nor the J-Link manual says how to access this feature from the firmware side. ie, how does the embedded target code send stuff to the "VCOM", and how does the embedded target code receive stuff from the "VCOM"

Quote from SEGGER - Nino: “Generally all our current J-Link debug probes come with a VCOM feature ” The Wiki further defines "current" as: Quote from Segger J-Link Wiki: “Currently, only J-Link models with hardware version 9 or newer come with VCOM capabilities ” and also notes: Quote: “VCOM can only be used when debugging via SWD target interface ”

Looks like a cross-post from the Nordic forum: devzone.nordicsemi.com/f/nordi…-time-from-pc-to-nrf52840

Quote from SEGGER - Nino: “we are going to improve J-Link softwares behaviour in future so you are prompted with a pop up asking you which areas are considered active and should be erased when a simple erase is called ” Hmmm ... that could quickly become an annoyance rather than an "improvement" ...

Quote from japa: “I am using Cortex M4 EFM32 Pearl gecko chip (EFM32PG12B500F1024GL125) to write and read a configuration file using J-Link Commander ” I don't really understand what you mean by that - please explain further. A diagram might help... Quote from japa: “I erased the internal flash memory of the chip using "erase" command. Is there any way by which I can get my memory back? ” No. 'Erase' really does erase - all the Flash bits are set to '1'. You will have to re-program the chip with…

Quote from SEGGER - Nino: “Why do you need to have a specific configuration active when Embedded Studio starts? ” My reason (in the linked thread) is that it is quite likely that one of the configurations will be the current "preferred" configurations - and that is unlikely to be dictated purely by alphabetical order! eg, during development, there may be different configurations to match evolving hardware revisions. I know that VisualStudio provides this option. @noebrun : as noted in the linked…

Quote from TxCodeMonkey: “There must be something in Windows 10 ” I'm seeing it on 7. Quote from TxCodeMonkey: “at startup SES should not be, no? ” Hmmm ... who knows? Maybe it does a scan to see what emulators are available, or something ... ? When I've seen it, it's been with the onboard JLinks on Nordic boards - which also have COM port and MSD. I don't recall seeing it with just a standalone JLink. ISTR Keil having a similar problem with uLink ... ?

This has come up a few times before. One thing that I've found to "release" it is to unplug any dev kits or J-Links ... forum.segger.com/index.php/Thr…Power-Fail-Unrecoverable/ forum.segger.com/index.php/Thr…uilding-in-the-Title-Bar/ forum.segger.com/index.php/Thr…-failed-attempted-at-GIT/

devzone.nordicsemi.com/f/nordi…egister-name-vfpcc-in-asm

Funny, that: I'm sure there was one - but can't see it now. I guess it should go in 'General', then: General

Quote from TxCodeMonkey: “On topic ” Not really - you're in the J-Link forum!

Quote from seggfreddy: “source-code under test has calls to Cortex-M7 functions __dsb(), __isb(), __nop(). S ” Is this source code 'C' or C++ ? In SES, what happens if you do 'Go To Declaration' (or 'Go To Definition') on these? That should tell you where SES is getting the declarations from ...

Has anyone been able to get Coverity static analysis to work with the GCC that SES ships with? I'm using coverity 2018.09 with SES 4.16, attempting to build project using NRF52.

Quote from SEGGER - Nino: “This is indeed possible ” Thanks. Have you been away on holiday? Hope you had a nice time.

Quote from SEGGER - Nino: “We will evaluate if the wording can be improved in the manual ” My point is that there is nothing in the manual at all! It goes through basic stuff of how to add files to a project, and this really is part of that process - so it really needs to be described in that section. It certainly needs to be in the manual itself - not hidden away in a Wiki.

Cross-post: keil.com/forum/64441/#/msg212704 So is this error coming form Keil uVision, or from the J-Link?