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  • Ozone on debian buster segfault

    SEGGER - Nino - - General

    Post

    Hello, Great to hear that you are up and running again. Quote from billium: “If I can find out how I'll mark as solved. ” Don't worry I will take care of it. Quote from billium: “One point though, if I use JLinkSWOViewer I can see my ITM_Print(0,"hello") but although the terminal now has 'SWO Active' I do not see anything when the processor is running. (All it is doing is sending ITM print messages every second) ” All you have to do is enable SWO in trace settings in Ozone. Make sure that the st…

  • Hello, We received your inquiry vie our support system as well. To keep all information at once place this thread will be closed now. Best regards, Nino

  • Ozone on debian buster segfault

    SEGGER - Nino - - General

    Post

    Hello, Thank you for your inquiry. The issue should be fixed with Ozone V2.62f. Could you give it a try? Best regards, Nino

  • Hi, G4 support will be added with the next J-Link software beta planned this week. To get a notification when it is available you can subscribe here: segger.com/notification/subscribe.php?prodid=7,94 Best regards, Nino

  • Hello, Thank you for your inquiry. The J-Link software package for ARM hosts comes without support so please understand that we can't put time into this issue. Alternatively we recommend using an external PC that is connected to the Raspberry via Network and use a Telnet Client on the external PC to access the RTT data via port 19021. To enable this RTTTelnetAllowNonLocalClient must be set in the Raspberry instance. More information can be found in the J-Link user guide UM08001. Best regards, Ni…

  • Hi, We have now ordered the boards and will investigate this when they arrive. Best regards, Nino

  • Hello Long, Please understand that we can't assist you further here as it would leave the assist scope of our forum as it is user responsibility to debug user made setup issues. We provided you with a working example project for reference which you can use for further investigation. Best regards, Nino

  • Hello, Quote from Asinus: “Where do I have to correct this? In an existing file or in project optinons or where? ” You can do so in the project options in category Linker. There you can right click the entry and select open. Or if you right click your project in the project explorer in the context menu you should see "Edit Linker Script" at the bottom. EDIT: Sorry this was how to edit linker scripts but they are correct. You need to edit the memory map or memory segments settings instead. In pro…

  • Hello, Thank you for your inquiry. It is possible that some markers are missing from the elf files depending on the compiler version. Could you provide the elf file for reproduction? Best regards, Nino

  • Hi Ewout, Thank you for your inquiry. Currently the conversion tool is not available for ST-Link v3. The reason is simply because there was yet no eval board out there that had a ST-Link V3 on board. This seems to be the first board to our knowledge. I tried to find it in the usual electronic supply shops but it seems like it is not available publicly yet. Could you point us to the shop where you purchased it from? We will then order some and see if the conversion tool can be expanded. Best rega…

  • Hi, Thank you for providing the project. With it the issue was reproducible. It will be fixed with the next Embedded Studio release. For now try not to merge strings. Sorry for any inconveniences caused. Best regards, Nino

  • Hello, Thank you for your inquiry. Such an issue is not known to us. Do you have string merging enabled in project options under Linker->Merge String Constants? If yes could you disable this and report back if that changes anything? Could you provide an example project for reproduction purposes so we can investigate if the Linker behaviour can be improved? Best regards, Nino

  • Hello, Thank you for your inquiry. Was this an existing project or did you create a new one? If you created a new one could you tell us which steps you took? To correctly solve this issue check your memory map or memory segments projects option (depending on which you are using) and make sure that FLASH is renamed to FLASH1 and RAM to RAM1. Best regards, Nino

  • Hello, Thank you for your inquiry. This behaviour is expected as Cortex-M targets only support data breakpoints with masked conditions e.g. ==. So this is unfortunately a limitation of the target device you are using as explained in the Embedded Studio manual. Best regards, Nino

  • Hello Dave, Great to hear that you are up and running again. We will consider this thread as solved now. Best regards, Nino

  • Hello, Great to hear that you are up and running again. We will consider this thread as solved now. Best regards, Nino

  • Hello, Thank you for your inquiry. Such an issue is not known to us. We tried to reproduce the issue with the example project attached. Could you give it a try? Does that work on your board stand alone as well? Where do you place your RTT control block? Could you try using the latest J-Link software version? segger.com/downloads/jlink/#J-…twareAndDocumentationPack Does it work then? Best regards, Nino

  • Hi Dave, This is odd indeed. Lets pretend NXP simply programmed a wrong value there Would not be the first time we see incorrect read only register values. Best regards, Nino

  • Hello, Thank you for your inquiry. Currently there are no plans to add support for Cortex-M7 tracing to Keil from our side. It is available via our generic J-Link/J-Trace API for a couple of years now but Keil uses their proprietary integration. This would mean double the coding and double the maintenance effort from our side for a feature that has been available for quite a while which is why adding support is currently not viable to us. For the best trace experience including Cortex-M7 tracing…

  • Hello Matthias, Thank you for your inquiry. How exactly is your debug setup here? You have one Ozone session for the CM4 core and one for the CM0. Is that correct so far? Where did you place the RTT control block? In the shared memory? How many control blocks are you using? For each core one? Are both cores writing RTT data or only one? If you are using an approach with one RTT control block then make sure that each core uses its own RTT up buffer. This has to be considered when writing but also…