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  • Hello Everyone, I'm trying to debug a bare-metal Cortex A5, an Atmel SAMA5D27 to be precise, with a J-Link Pro. The program code, built with ARM Clang, is running from DDR and debugs (from DDR) just fine. The problem that I have relates a small portion of Position Independent Code that is on-demand relocated from the DDR to IRAM1. The relocated code tests the DDR so cannot run from it. The linking, sections, L2 Cache disable, stack relocation, code relocation is working and I can jump into the P…