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  • Have you tried? Is it connected to some MCU board or directly to the flasher?

  • [SOLVED] SWD multidrop?

    ddbug - - J-Link/Flasher related

    Post

    Thanks Alex. All I understood from these articles is that this is not just a 'passive' fan-out of the SWD lines to multiple MCUs, and should be licensed by MCU maker. So not a cheap JTAG alternative. Ok.

  • Is support planned for external QSPI flash support on STM32F4 MCUs like it exists for STM32F7? I create a project for STM32F446 in J-FLASH 7.84 but it gives by default only one bank for internal flash. No option bytes, no QSPI. If I start from a project for STM32F7 and change MCU type to STM32F446, the banks for option bytes, QSPI disappear (( -- dd

  • [SOLVED] SWD multidrop?

    ddbug - - J-Link/Flasher related

    Post

    The wiki info on the current J-LINK models lists a feature named "SWD multidrop". Where we can find more about this? It sounds like a cheap alternative to JTAG chain for systems with multiple targets. -- dd

  • Rejoiced too early (( This still does not work with ST Cube IDE. Copied v.7.82e DLLs to the Cube. Started debugger and opened the web UI. The QSPI flash pinout/loader name selection won't persist after change. Every time when I start debugger, I have to change the QSPI loader and relaunch. Even after this, the debugger goes hairwire and resets the target: ......... Downloading 112 bytes @ address 0x2000AEFC - Verified OK Downloading 63 bytes @ address 0x91000000 - Verified OK <-------------- thi…

  • Great, thank you! The picture in the wiki, by the way, is not from the web control panel. Below is the screenshot for V7.82e and STM32F767. forum.segger.com/index.php/Att…4a43e33f605fb5fa0b47a68f6forum.segger.com/index.php/Att…4a43e33f605fb5fa0b47a68f6

  • TL;DR the recent J-Flash versions (from 7.82) have a special way to handle QSPI flash: you need to specify the QSPI controller pins as the "loader name", for example "CLK@PB2_nCS@PB6_D0@PD11_D1@PD12_D2@PE2_D3@PD13". This means: CLK->PB2 CS->PB6 D0-3 -> PD11,PD12,PE2,PD13 Alternative pinouts can be selected in drop-down list. Knowing the pinout, J-Flash sets up the QSPI controller and reads the flash ID and standard parameters table. This includes the erase block size, command codes, times etc. W…

  • That's great, thank you Alex! Is the "universal" QSPI flash programming also supported in this mode for STM32 ? How to pass the "loader name" such as CLK@PF10_nCS@PB10_D0@PF8_D1@PF9_D2@PF7_D3@PF6 to the DLL? --dd

  • The recipe for using the J-Link flash loader with EWARM IDE ends abruptly at the most intriguing moment... "Uncheck Use flash loader(s) in order to disable the IAR flash loader and enable the J-Link built-in flash loader." How can we enable the J-Link built-in flash loader? There is no such option in the J-Link submenu in EWARM or in the project options. I've installed J-Flash v. 7.82e.

  • Resolved. After reporting this to the support, they found the problem, fixed; it works for me in version 7.82e. Good work, thanks!

  • I had a working J-Flash project for a custom board similar to STM32F746 DISCO. The QSPI flash on the board is S25FL256L, J-Flash could program it and read back. Today updated to version 7.82c, Windows 64-bit, on Win11. When I opened the project it complained that the loader for ext . flash is wrong and demanded to change it to "CLK@PB2_nCS@PB6_D0@PD11_D1@PD12_D2@PE2_D3@PD13" After that it no longer can read the QSPI flash. Says: Source Code (7 lines) It also advised to update the J-Link firmware…

  • Alex, The customer have sent me their .jflash file, but they have a different J-LINK variant. I have Plus and they Pro. Are these two variants different enough in the aspect of external flash programming? Notice that the flash bank #2 definition in the .jflash does not go to any details about the pin configuration of the STM32F746, its clock rate and even about the flash chip. J-Flash seems to detect all this alone. Is this correct? Btw, I don't believe that you are not familiar with the term "e…

  • The OTP is 1024 bytes at 0x1FF0F000, writable (I think) by 4 bytes or one byte (the lock array). How this should be properly defined as the "flash bank"?

  • Dear experts, I'm new to J-FLASH and J-LINK. Please advise. A customer has a board with STM32F746 and QSPI flash. Their program has data in the QSPI flash, and they flash the app using J-LINK and J-Flash. Now, I cannot figure out how J-Flash deals with QSPI without "external loaders"? And programming the QSPI part of the data does not work for me. The internal flash part programs OK. Erase of the QSPI also looks OK. So I assume that J-LINK itself, cables, power are OK. The customer says they nev…

  • Thank you Yan. USBH_ConfigSupportExternalHubs is called, and hub works, but not stable. We need this thing to work against a KVM that has internal hub. The KVM often switches back and forth, every time the hub and all devices behind it re-enumerate. The problem can be caused by hardware. I'll check better later. Regards, -- dd

  • Ok, we started testing on the first board and see some strange results with a full speed hub. This likely is because of our errors or electric problems. But may I ask, is the demo version of the usb host library crippled in any way, such as error handling disabled? -- dd

  • On which STM32F407 board this can be reproduced? Is it like this one? st.com/en/evaluation-tools/stm32f4discovery.html or like this one? -- dd

  • This is a great result. I'd like to reproduce this on a STM32F446 board. But 446 is not in the list of supported drivers: segger.com/products/connectivi…-host/technology/drivers/ Does embUSB-Host always require the RTOS, even in non-evaluation version? -- dd