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I'm using IAR EWARM 7.70 and I get the following error after my probe (V9.3) was flashed following a J-Link update (release V6.16e)... Error while compiling J-Link script file: Error while compiling. Line 46, column 3: __int64 v; // We need 35 bits: 32 data, 2 bit addr, 1 bit RnW Syntax error Uninstalling 6.16e didn't make the problem go away and now I am stuck. Any suggestions? -rob --update - I borrowed another probe and refused the firmware update but got the same error message in IAR. Eviden…

Still not working with V5.12f. The CORESIGHT_SetIndexAPBAPToUse command wasn't helpful - still no control block found.

Hi Alex, The i.MX6S5 variant I'm using has the AHB-AP bus. The RZ app note was useful wrt CB init in the startup code but the mmu setup not so much since I'm using different hardware, IDE & RTOS. I would really appreciate it if Segger could do an RTT example for the i.MX as they did for the Renesas part. -rob

Hi Niklas, ...but have you or anyone at Segger actually seen RTT communicating with an i.MX6? My experience with MMU address translation is limited so I even tried placing SEGGER_RTT_Init and SEGGER_RTT_WriteString before starting the MMU. No cigar. -rob

RTT is fairly easy to integrate with Windows using the Segger supplied dlls and SDK. We used it to automate production testing of a M4 based device at an offshore CM. The EOL PC ran a C# program - I had to add a few p/invoke signatures to use the RTT calls in the dll ... [StructLayout(LayoutKind.Sequential, Pack = 1)] public struct JLINK_RTTERMINAL_START_t { public UInt32 ConfigBlockAddress; public UInt32 Dummy0; public UInt32 Dummy1; public UInt32 Dummy2; } [DllImport("JLinkARM.dll", CharSet = …

Has anyone successfully implemented RTT with an iMX6? A recent Segger app note shows RTT working with Renesas RZ (also Cortex-A9 based) and I am hopeful that it will likewise work on the iMX. I've successfully implemented RTT on three different M4 cores so I'm confident about my code. I've zero inited the RTT CB and I can see the RTT tx buffer getting filled with the debugger. I've placed the buffers and control block in both the OCRAM as well as non-cached areas of SDRAM however the Segger RTT …