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Thanks for the confirmation. I have a custom ASIC with the potential for the SWD lines to be re-configured as GPIO when the ARM starts executing code. We can reduce the chance of this happening in code but it'll be a possibility to a degree. I'm trying to see how fast I can connect and halt by having my JLink script reset function perform a hard reset (via the JTAG 20-pin RESET pin) then wait for a successful CORESIGHT_Configure() call before asserting the S_HALT & S_DEBUGEN bits in the ARM core…

I'm trying to reduce the time taken to connect the debugger and halt the Cortex M3 core as much as possible. I see delays between JLinkScript calls that I think are down to the DLL interpreting the script on the fly. The SEGGER Wiki page about JLinkScript mentions pre-compiled pex files - does anyone know anything about creating these compiled binary files? Is this only a format internal to SEGGER? Cheers