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Disable gloable interrupts....disable each task separately OS_Suspend(...) or perhaps OS_SuspendAllTasks()

Thanks Til, will do. I meant to include the detail that I am uisng Keil 4.70. Also, I would appreciate if anyone has a recommendation for any static profiling tool that would compute this kind of information. Todd

I am using embOS on a ARM cortex-M0 processor. Is there a document that characterizes in what OS functions and for how long (# instructions), interrupts are disabled? I realize it would depend on optimizations and some would be not fixed (OS_PeekMail). But a general characterization with perhaps a range would be greatly beneficial. I can then concentrate on what API functions I need to be weary of. On a processor like the M0, there is no such thing as high priority interrupts. I have a known "re…

I am trying to modify the normal “ResetTarget()” action by using a J-Link script. Background; I am using Keil and J-Link for a custom Cortex M0 in SWD mode. Everything thus far worked just fine without any needed customizations. But a change in code now means that before the normal reset action can occur, I have to default 2 memory mapped registers that are not automatically defaulted by a reset. So referencing Segger’s example scripts, I tried to implement what is needed. I attached the script …