Search Results

Search results 1-10 of 10.

This site uses cookies. By continuing to browse this site, you are agreeing to our Cookie Policy.

  • Hello, 1) Since version V8.12 of "Segger IDE", the majority of text formatting options have disappeared (Options->Text Editor->Formatting). There are only three left: - Formatting Options - Formatting Style - Use .clang-format File Up to version V8.10d, I have access to more than 70 options (with the same settings). 2) Since version V8.12, I no longer have access to the GIT management options from the "Project Items" panel...

  • Hello, thank you for your prompt response. I've found ! I had added "JLV" in "Additional Formatting Styles" and when I do that, the IDE crashes when I format the code (and the "Crash Reporter" window too). For the second point, yes, we can manage to have the formatting that we want, but it would be useful to be able to memorize the different styles modifications under different names. For example, imagine that you work with GIT with several colleagues who use different styles. Everyone could agr…

  • Hello,I don't know why, but now the code formatting command crashes the IDE even though it was working a short time ago. I tried to update to 6.20a and reverted to 5.68 and 5.64, and now whatever version the command crashes the IDE whatever file I want to format. I don't know if it was a premise, but for some time the IDE crashed for no reason from time to time (my PC is recent -W10 21H1, AMD Ryzen 7 5800H, 32GB-, and I don't see any problem elsewhere). By the way, (when it will work) is it poss…

  • I understood the problem!: indeed the domain D2 was not power up when the linker copied the data. This is due to the STM32H7xx_Startup.s file which calls the SystemInit () function in system_stm32h7xx.c in which a define allows you to indicate whether or not you want to power up the D2 domain (which by default is not). C Source Code (10 lines)Just uncomment the define DATA_IN_D2_RAM for everything to be ok. Best regards Jean-Louis

  • Hello,I guess I would have to do something simple for it to work, but I can't (despite the fact that I read the doc of the Segger linker)...The xml and icf files I use are those of Segger. Source Code (74 lines)and the file: XML Source Code (12 lines)At the start of the program, I put some initialized variables: C Source Code (16 lines)and at the beginning of main () a printf for debug: C Source Code (6 lines)and the result is this: Source Code (13 lines)I do not understand why RAM1..3 is not in…

  • Hello, thank you for your reply Unfortunately, to say the least, the development of multi-core applications is not well documented. Among manufacturers, there is a lot, a lot, more money spent on marketing to promote the products than on documentation explaining how to use them. The few rare documents that we find focus on the multi-core debug, which is (perhaps) an important point, although I strongly doubt its real interest (to begin with, it would be good if the IDE did not crash not when I p…

  • What I expected is that there is a master project corresponding to a given core, and that the place of variables and functions of each additional core is allocated sequentially by the linker. Obviously, variables (and functions?) With the same name would be common ...Is this an unattainable dream? ps thanks for the links

  • Hello Nino, "Just make sure they do not overlap" Of course ! But normally, it is precisely the role of the linker to deal with overlapping variables. And how do we do for common variables? Should each of us set its address so that they can be seen by the respective projects? On a big project, I fear that it represents a lot of work and is the source of many errors. Best regards Jean-Louis

  • Hello, Is it possible to use Embedded Studio, and more specifically the Segger linker, to develop applications on STM32H7 dual-core processors? How do we inform the linker, when we compile for a core (in a project), of the space taken in the different sections by the other core (in another project, but in the same solution)? In the project window, which organization should we choose to organize a double core project as best as possible? Best regards, Jean-Louis

  • Hello,I'm testing the Segger linker, and I have some troubles about initializing variables. The processor I use is an STM32H743, the linker is the Segger linker, the icf file is STM32H7xxFlash.icf provided by Segger (which defines the sections AXI_RAM1, RAM1, RAM2, etc.), Embedded Studio Release 4.30c Build 2019120200.40763 I have an array (of structure) which I initialize with constants. If I do not give any instruction, the table is implemented in the AXI_RAM and initialized... ok : burst32_t …