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I need to debug the CPU inside the TI (former NS) bluetooth/CAN chip called CP3CN37... I have the datasheet of TI but they won't tell anything special about JTAG but providing the pins for it. When i attach the J-Link probe i don't know which CPU type to choose as i don't find the above chip type in the list. If i choose some generic one just to probe the chip i get this JTAG ID out of it: ConfigTargetSettings() start ConfigTargetSettings() endTotalIRLen = 8, IRPrint = 0x0001JTAG chain detection…
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Thanks for fast reply and for pointing out how J-Flash works! Yes, i want to unlock and reflash the content of the MAC7116. As for the datasheets the MAC needs a special unlock procedure by sending special commands to the internal Flash controller (CFM) via JTAG. This is done by memory mapped registers. All could be done by writing to registers only, no need to have any RAMcode at place (i think). So i if i add all needed commands into the MCU Init sequence, it should all work, right? But what h…
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Hello, i try to create a procedure to unlock an MAC7116 chip using J-Flash. For this i need to boot the chip into extended mode where internal Flash and RAM are disabledm connect to the device, setup clocks and write some commands to the internal CFM controller. The chip does not provide a TRST signal for the TAP, instead the chips /RESET is used. One thing that i found out soon was, that the Segger default using 0 ms delay after init reset command is wrong. It can't connect to the chip because …
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I see, thanks. It seems that there is something missing on halting the system for Jtag access (watchdog, etc.) so the RAM code get's interrupted. How can i add some extra register settings i suspect? Or better, what excatly does the HALT and the Disable MMU command from the J Flash init procedure do/send to the chip? This i can compare with the settings i think is right and add the missing commands? And another question is driving me mad: How can prevent the chip from executing bootcode after po…
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Hello, i've get this error while trying to read a Flash (S29GL512N) attached to the EMIFS interface of an OMAP5912 (ARM9 based) using J-Flash. It aborts after reading 20 or 30 sectors with the error shown here: forum.segger.com/index.php/Attachment/3170/ forum.segger.com/index.php/Attachment/3171/ If i get it right, the J-Flash emitts a reader-helper (RAM code) into the SRAM of the OMAP and sets program counter (PC) to execute it. This RAM code reads sectors from the Flash chip into the SRAM and…
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If i get it right, J-Flash (Lite) will download some piece of code into the CPUs SRAM and executes it to do a fast Flash-content transfer via JTAG. I wonder if it is possible to add some custom code to this routine, because i have a system with an external Watchdog, which needs to be feed, even when CPU (and therefore the running application on it) is haltet. The watchdog is feed by an SPI-Wire from the CPU (OMAP-Plattform).
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Hi Nino! Thanks for reply Yes, i will dig into JLinkScript. I found this tiny Wiki article wiki.segger.com/J-Link_script_files and the referred UM8001 handbook (btw: the link in the wiki downloads a file without suffix. I had to add '.pdf' myself to make it readable. Maybe one could fix this in Wiki). I aggree in disabling the Watchdog, and the Coprocessor (CP15) also. I guess in the moment J-Flash sends the "HALT" command to the CPU the Watchdog is not feed anymore and the following commands mu…
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Hello, because this MPU is not directly supported by Segger J-Link i searched the net for solutions and found a connectionscript for an other JTAG Interface here: download.ronetix.info/peedi/cfg_examples/arm9/omap5948.cfg Now i wonder if it could be "translated" to Segger script language. I started with J-Flash (v6.x) where i use "ARM9" as architecture (which the OMAP5948 is) and added "Halt" and "Disable MMU" commands in init steps. Set init-speed to "Adaptive" and pre-init-speed to "Auto". Wit…
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Today i wanted to read the internal and external Flash of a MAC7116 Microcontroller on an car instrument cluster. The J-Flash 6.22g tool did connect instandly and i choose "Target-> Manual programming -> Read back -> Entire Chip". This starts with 4 progress bars and in the last is stops with an error message. After that the system does not start any more, like it's killed. The J-Link Commander could still connect to the chip, identify it, but could not halt the CPU and therefore it can't to any…
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You're wrong about the lowlevel signalling in J-Link commander. These commands can set/unset the lines manually: t0 => Set TMS to low t1 => Set TMS to high 0 => Set TDO to low (i think it's documentation errero, because it's called TDI which would make no sense to SET an INPUT 1 => Set TDO to high c => Cycle TCK one pulse Normally that would be sufficient. If i write it to a script and call it on startup of jlink.exe it seem to work. When connecting an Logicanalyzer i can find the statemachine t…
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What i want to do is to learn how it works on a veeery basic level. So is it possible to set the TMS/TCK/TDO/TRST lines like i want? jtagload.exe expects VSF commands in scripts, which are some sort of "highlevel" also. Maybe there are instructions inside jlink.exe (Commander), but i am not shure. To get the concepts right, i need to set the values by hand and if this works go to next level using meta-commands doing all the dirty groundwork for me
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Hello, i use a Segger J-Link EDU and want to explore an unknown system providing a JTAG connector. The connections are all done and documented, but i don't know what the system provides. So my thought was to test device by device by getting it's ID and do a lookup. How can, how should i do this? In my current understanding of JTAG each device should send it's device ID when a special command is send to it.
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I bought a Segger J-Link EDU for my private testings (S/N 268004270). Maybe i shoot to high, but i tried to connect to a faulty radio (Blaupunkt Travelpilot FX) which has a OMAP5948 on board. The device is not booting up and i want to get more information by connecting to it's JTAG port to see what's wrong. After browsing hours and hours i found out that this is not a standard device from TI and information about it is somewhat "confidential", so you can't find it anywhere. But it should be an A…