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Hello, I have sent this as a support ticket but had no response since May 15, I will post it here again. we are trying to use the jlink debugger to debug our custom SoC. Our JTAG chain contains 2 taps: each one connected to a separate Risc-V processor. We are facing a problem where jlinkGDBServer isn't able to detect the 2 CPU TAPs (openocd connects successfully) The JTAG chain looks as follows: TDI -> TAP1(RV32) -> TAP0(RV32) -> TDO. Both taps have an IR length of 5. we run the following jlink …
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Hello Alex, I am mmahdi's colleague. We have a specific debugging case in our chip where we have the chip in an unrecoverable state (normal halt command won't work) and we need to send a command to for example force the halting of the cpu, I am doing this by writing a custom dmi register since the system is not yet halted and the CSR registers cannot be written yet, do you have a better idea in mind that may be already supported ? Is there no way of sending any kind of custom instructions to the…