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That has done the trick. Thanks for looking into this for me.

I have some example code from IAR using embOS that just flashes an LED. I have found that the same thing happens with this code also. As soon as the call to OS_ARM_MMU_Enable is executed the QSPI registers become unavailable. I have attached the project for you to have a look at. forum.segger.com/index.php/Attachment/2591/ Thanks.

Hi, We are currently using embOS v4.16 for ARM in an IAR EWARM environment, with the target being a Renesas RZA1H processor. In the file rtosinit_R7S72100.c, in the call to __low_level_init() ,if I enable the SPI Multi I/O bus controller, add the MMU entries to the translation table and then call OS_ARM_MMU_Enable(_TranslationTable) I've found that the registers for the SPI Multi I/O become unavailable. I have attached 2 images to show the registers before and after enabling the MMU. forum.segge…

Thanks to you both for your replies. It turns out that it was the MMU and the caches. In RTOSInit_R7S72100.c the cache mode for the 10MB internal mirror RAM was set to Write-Back, changing it to Write-Through solved the problem. Thanks again, Allan

Hi, I have an openVG demo running on a Renessas RZA1 demo board. The demo runs fine when there is no rtos involved. I just have a function that I call from main with a loop that rotates a coloured rectangle. When I introduce embOS (embOS ARM IAR V6) into the demo and call the same function from a single task, it stops working. The task runs fine, but the output to the display is wrong. It's like the frame buffer isn't getting the correct data. One thing I have noticed is that the project is usin…