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Hello, Several months ago I have asked question about J-Trace buffer: [SOLVED] [J-Trace] What is the maximum timeline instruction buffer? I got answer: Quote from SEGGER - Fabian: “Hi, Thank you for your inquiry. Currently we have a 64Mb buffer on Host side (for legacy reasons). This handling will change in the near future to be unlimited. Stay up-to-date regarding J-Link: segger.com/notification/subscribe.php?prodid=7,94 How many instructions fit into this buffer depends on the instruction pack…
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SSD? You mean hard drive? So it will depend only on hard drive space and continuous download of time line will be possible? In other words: now if I stop the trace it loads the timeline with only about 800ms. In future release if I stop the timeline it will be possible to analyze whole data?
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This is good news, thank you! What buffer size can we expect in future release? Do you plan to make a continuous download of trace data? It would be very helpful to diagnose errors which happens very rarely and to do it offline on saved data chunk. Best regards, Maciej
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Instruction count is set to 20G but I get exactly 67,351,178 instruction no matter how long I run the trace. LiveTrace tab in device manager shows it is using minimum buffer but SWV tab shows it is using all Host Buffer and have red/orange color. Why it is using SWO anyway and how to make the host buffer larger?
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Hello! I'm using J-Trace with reference Cortex-M board configured in Ethernet mode, 50MHz SWD, 168MHz CPU frequency, 4bit trace port width and maximum instruction count to 20G. Even if I select larger maximum instruction count I always get about 800ms of past instruction trace timeline data. What is the maximum size buffer and how it is affected by other parameters? Is it possible to store longer timeline for offline analyze?
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Thank you sir!
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Hello, I would like to buy J-Trace PRO for Cortex (all not M-only) and use it both for trace and as a standard debugger like JLink PRO. I have read that JTrace does not have full JLink capability - is that true? segger.com/products/debug-prob…nk/models/model-overview/ It does not support all JLink Pro cores? Or it does not supoort those core for tracing only and it does have full JLink Pro capability?
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Hello, I have found that JScope is a great tool but it is not developed anymore? I was wondering is it possible to use multiple channels in parallel like: JScope_t4u4 JScope_t4u4i4 So both channels can be updated iindependently of each other? With single channel the use is very limited because there must be a thread/call from timer to update values. It would be very helpfull to push values to channels in multiple places of code with synchronisation. If I would like to write my own JScope do I ne…
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Documentation: segger.com/downloads/jlink/UM08001 Paragraph 7.13.5.1 Supported Operators Operator >> does only 2^n divisions/multiplications.
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Hello, I can not use simple division inside the script though documentation say it is supported. Im using version v6.72b. What am I doing wrong? Script: C Source Code (3 lines) JLinkGDBServer output: Source Code (5 lines)
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Hello! I need to make full initialization of Texas Instruments AM335x by JLink. I have already configured MMU and DDR but to enable MMU I need to write to CP15 registers. How to do that from JLinkScript or is there any other walkaround that problem?
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Hello, My J-Trace probe SN: 932000322 I have configured pins as TPIU, enabled the clocks but I do not see 150MHz clock on TRACECLK pin which should be outputted from traget (not J-Trace)? All trace pin configuration is compiled and run from flash. How J-Trace is automatically configuring the target? The CoreSight register in AM335x is at 0x4B140000 address. How J-Trace know which address space write/read to configure the target?
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This is original closed thread: [SOLVED] J-Link RTT not working on AM335x Where Niklas wrote: Quote from SEGGER - Niklas: “Hi Alexandre, as described on the website, J-Link RTT is supported by all devices/cores with background memory access. Unfortunately, Cortex-A8 does not support this feature. Best regards, Niklas ” Which is partially wrong. Background memory access is optional in Cortex-A and it depends on silicon manufacturer. In that case (TI AM335x) background memory access is present and…
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I debug different MCU. My J-Links have got different serials. Thank you for your help! I did not notice it is possible to setup JLinks under Host Connections. :)
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When working on Windows I use two instances of Segger Embedded Studio with two JLinks to debug Nordic's Bluetooth application. Is it possible on Linux? Whenever I try to connect in second instance (SES) it disrupts first instance.