Search Results

I can confirm the connector shown above worked for us on the BG22. You have to slow HCLK down by a factor of 8x to allow ETM enough time to keep up with the data rate from the trace. I did that with this line: Source Code (4 lines)

Alex, Thanks for your quick reply. As far as I know, there is only either the 20 MHz RC oscillator running or the 39 MHz crystal running. We are not using any special clocking like the clock multiplier or divider, one of those frequencies are the main CPU clock when waking up. There isn't any other fixed 8Mhz clock or similar thing on these boards or internal within the CPU. I would assume trace clock is running at half the CPU, or whatever is usual for it. We are currently waiting for the conne…

Hello, I am trying to build the 19 pin debug+trace connector for a Silicon Labs EFR32BG22.Here is the link to the reference manual for that part: silabs.com/documents/public/re…-manuals/efr32xg22-rm.pdf (Please do not think I expect you to read this, it is only for reference) I used this link to describe the debug+trace connector: wiki.segger.com/19-pin_JTAG/SWD_and_Trace_Connector Here is the connection list I have created: * Name * EFR32BG22 * Pin * * Pin * EFR32BG22 * Name * VtargetReference …