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  • [SOLVED] Cortex-M JTAG connector interface. Differences between Texas Instruments and SEGGER guides

    occam25 - - General

    Post

    Hi Nino, Thanks for the answer! The thing is that the schematics you suggest from TI don't follow SEGGER's guidelines (TDI line is not pulled to any defined state) nor their own TI's guidelines (they just pull up TMS and TCK and forget about the rest). I already noticed that in TI's Tiva Launchpad schematics and, when I asked TI about that, they answered me that the evaluation boards are made in a quick and cheap way, that they shouldn't be taken very seriously, and that I should follow the TI's…

  • [SOLVED] Cortex-M JTAG connector interface. Differences between Texas Instruments and SEGGER guides

    occam25 - - General

    Post

    Hi, I am designing a board with Texas Instrument's TM4C123GH6PM microcontroller and I have found contradictory information between the TI's TM4C12x JTAG guide and SEGGER J-Link user guide. In the first one, "Using TM4C12x Devices Over JTAG Interface", it uses a series resistor in pin1(VTref), a pull down resistor in TDO line, no pull-up nor pull-down on TDI line and series resistors in TMS, TCK, TDO and TDI (screen shot attached) On the other hand, the SEGGER J-Link user guide says that VTref (P…