Setup_IOMUX_QSPI() { /** IOMUX config **/ __message "---- Setup QSPI IOMUX ----" ; /*QSPI1A1 pins init*/ __writeMemory32(0x800,0x4103D0BC,"Memory"); //QSPIA_SCLK __writeMemory32(0x800,0x4103D0A0,"Memory"); //QSPIA_SS0 __writeMemory32(0x800,0x4103D0C0,"Memory"); //QSPIA_DATA3 __writeMemory32(0x800,0x4103D0C4,"Memory"); //QSPIA_DATA2 __writeMemory32(0x800,0x4103D0C8,"Memory"); //QSPIA_DATA1 __writeMemory32(0x800,0x4103D0CC,"Memory"); //QSPIA_DATA0 } Disable_Cache() { __var Reg; if(__readMemory32(0xE0082000,"Memory") & 0x3) { __message "---- Disabling Cache ----"; Reg = __readMemory32(0xE0082000,"Memory"); Reg |= 0x05000000; __writeMemory32(Reg,0xE0082000,"Memory"); //LMEM_PCCCR Set INVW0,INVW1 bits Reg |= 0x80000000; __writeMemory32(Reg,0xE0082000,"Memory"); //LMEM_PCCCR Set GO bit // Wait while operation completes while(__readMemory32(0xE0082000,"Memory") & 0x80000000); Reg &= ~0x3; __writeMemory32(Reg,0xE0082000,"Memory"); //LMEM_PCCCR Clear ENCACHE and ENWRBUF bits } } Disable_MPU() { if(__readMemory32(0xE000ED94,"Memory") & 0x1) { __message "---- Disabling Cortex-M4 MPU ----"; __writeMemory32(0,0xE000ED94,"Memory"); } } Setup_Clock() { __message "---- Setup Clock ----"; __writeMemory32(0x00000101,0x41027304,"Memory"); // SCG0_FIRCDIV - Enable: scg_firc_plat_clk, scg_firc_bus_clk __writeMemory32(0x03000001,0x41027014,"Memory"); // SCG0_RCCR - RUN clock source: FIRC } Disable_Interrupts() { // Set PRIMASK __writeMemory32(0x00000001,0xE000EDF8,"Memory"); __writeMemory32(0x00010014,0xE000EDF4,"Memory"); // Clear exception number in xPSR __writeMemory32(0x01000000,0xE000EDF8,"Memory"); __writeMemory32(0x00010010,0xE000EDF4,"Memory"); } execUserFlashInit() { if(__driverType("jlink")) { // Current implementation of IMX7ULP J-Link handling // does not disable interrupts and does not reset the device // so this should be done explicitly Disable_Interrupts(); } Disable_MPU(); Setup_Clock(); Disable_Cache(); Setup_IOMUX_QSPI(); } execUserPreload() { if(__driverType("jlink")) { Disable_Interrupts(); } Setup_Clock(); Disable_Cache(); Setup_IOMUX_QSPI(); }