oscar@oscar-HP-250-G8-Notebook-PC:~/Projects/imx/sw/imx-yocto-L5.10.35_2.0.0/build/tmp/work/imx6qpsabresd-poky-linux-gnueabi/u-boot-imx/1_2021.04-r0/git/mx6qpsabresd_optee_config$ gdb-multiarch u-boot --nx -ix /media/oscar/b1877f95-cdff-4928-9aa1-3dfe90603ba8/imx/debugging/gdbinit_sabrsd GNU gdb (Ubuntu 9.2-0ubuntu1~20.04) 9.2 Copyright (C) 2020 Free Software Foundation, Inc. License GPLv3+: GNU GPL version 3 or later This is free software: you are free to change and redistribute it. There is NO WARRANTY, to the extent permitted by law. Type "show copying" and "show warranty" for details. This GDB was configured as "x86_64-linux-gnu". Type "show configuration" for configuration details. For bug reporting instructions, please see: . Find the GDB manual and other documentation resources online at: . For help, type "help". Type "apropos word" to search for commands related to "word"... warning: No executable has been specified and target does not support determining executable automatically. Try using the "file" command. 0x00000fc4 in ?? () Resetting target Sleep 200ms Writing 0x000C0000 @ address 0x020E0798 Reading from address 0x020E0798 (Data = 0x000C0000) Writing 0x00000000 @ address 0x020E0758 Writing 0x00000030 @ address 0x020E0588 Writing 0x00000030 @ address 0x020E0594 Writing 0x00000030 @ address 0x020E056C Writing 0x00000030 @ address 0x020E0578 Writing 0x00000030 @ address 0x020E074C Writing 0x00000030 @ address 0x020E057C Writing 0x00000000 @ address 0x020E058C Writing 0x00000030 @ address 0x020E059C Writing 0x00000030 @ address 0x020E05A0 Writing 0x00000030 @ address 0x020E078C Writing 0x00020000 @ address 0x020E0750 Writing 0x00000030 @ address 0x020E05A8 Writing 0x00000030 @ address 0x020E05B0 Writing 0x00000030 @ address 0x020E0524 Writing 0x00000030 @ address 0x020E051C Writing 0x00000030 @ address 0x020E0518 Writing 0x00000030 @ address 0x020E050C Writing 0x00000030 @ address 0x020E05B8 Writing 0x00000030 @ address 0x020E05C0 Writing 0x00020000 @ address 0x020E0774 Writing 0x00000030 @ address 0x020E0784 Writing 0x00000030 @ address 0x020E0788 Writing 0x00000030 @ address 0x020E0794 Writing 0x00000030 @ address 0x020E079C Writing 0x00000030 @ address 0x020E07A0 Writing 0x00000030 @ address 0x020E07A4 Writing 0x00000030 @ address 0x020E07A8 Writing 0x00000030 @ address 0x020E0748 Writing 0x00000030 @ address 0x020E05AC Writing 0x00000030 @ address 0x020E05B4 Writing 0x00000030 @ address 0x020E0528 Writing 0x00000030 @ address 0x020E0520 Writing 0x00000030 @ address 0x020E0514 Writing 0x00000030 @ address 0x020E0510 Writing 0x00000030 @ address 0x020E05BC Writing 0x00000030 @ address 0x020E05C4 Writing 0xA1390003 @ address 0x021B0800 Writing 0x001F001F @ address 0x021B080C Writing 0x001F001F @ address 0x021B0810 Writing 0x001F001F @ address 0x021B480C Writing 0x001F001F @ address 0x021B4810 Writing 0x43270338 @ address 0x021B083C Writing 0x03200314 @ address 0x021B0840 Writing 0x431A032F @ address 0x021B483C Writing 0x03200263 @ address 0x021B4840 Writing 0x4B434748 @ address 0x021B0848 Writing 0x4445404C @ address 0x021B4848 Writing 0x38444542 @ address 0x021B0850 Writing 0x4935493A @ address 0x021B4850 Writing 0x33333333 @ address 0x021B081C Writing 0x33333333 @ address 0x021B0820 Writing 0x33333333 @ address 0x021B0824 Writing 0x33333333 @ address 0x021B0828 Writing 0x33333333 @ address 0x021B481C Writing 0x33333333 @ address 0x021B4820 Writing 0x33333333 @ address 0x021B4824 Writing 0x33333333 @ address 0x021B4828 Writing 0x00000800 @ address 0x021B08B8 Writing 0x00000800 @ address 0x021B48B8 Writing 0x00020036 @ address 0x021B0004 Writing 0x09444040 @ address 0x021B0008 Writing 0x555A7975 @ address 0x021B000C Writing 0xFF538F64 @ address 0x021B0010 Writing 0x01FF00DB @ address 0x021B0014 Writing 0x00001740 @ address 0x021B0018 Writing 0x00008000 @ address 0x021B001C Writing 0x000026D2 @ address 0x021B002C Writing 0x005A1023 @ address 0x021B0030 Writing 0x00000027 @ address 0x021B0040 Writing 0x831A0000 @ address 0x021B0000 Writing 0x04088032 @ address 0x021B001C Writing 0x00008033 @ address 0x021B001C Writing 0x00048031 @ address 0x021B001C Writing 0x09408030 @ address 0x021B001C Writing 0x04008040 @ address 0x021B001C Writing 0x00005800 @ address 0x021B0020 Writing 0x00011117 @ address 0x021B0818 Writing 0x00011117 @ address 0x021B4818 Writing 0x00025576 @ address 0x021B0004 Writing 0x00011006 @ address 0x021B0404 Writing 0x00000000 @ address 0x021B001C Writing 0x00C03F3F @ address 0x020C4068 Writing 0x0030FC03 @ address 0x020C406C Writing 0x0FFFF000 @ address 0x020C4070 Writing 0x3FF00000 @ address 0x020C4074 Writing 0x00FFF300 @ address 0x020C4078 Writing 0x0F0000F3 @ address 0x020C407C Writing 0x000003FF @ address 0x020C4080 Writing 0xF00000CF @ address 0x020E0010 Writing 0x007F007F @ address 0x020E0018 Writing 0x007F007F @ address 0x020E001C Writing 0x000000FB @ address 0x020C4060 Reading symbols from u-boot... (gdb) load Loading section .text, size 0x3e4 lma 0x17800000 Loading section .efi_runtime, size 0xaf8 lma 0x178003e8 Loading section .text_rest, size 0x4dd9e lma 0x17800ee0 Loading section .rodata, size 0x19a7f lma 0x1784ec80 Loading section .hash, size 0x18 lma 0x17868700 Loading section .data, size 0x10788 lma 0x17868718 Loading section .got.plt, size 0xc lma 0x17878ea0 Loading section .u_boot_list, size 0x1f30 lma 0x17878eac Loading section .efi_runtime_rel, size 0xd0 lma 0x1787addc Loading section .rel.dyn, size 0xf4d8 lma 0x1787aeac Loading section .dynsym, size 0x30 lma 0x1788a384 Loading section .dynstr, size 0x1 lma 0x1788a3b4 Loading section .dynamic, size 0x90 lma 0x1788a3b8 Loading section .gnu.hash, size 0x18 lma 0x1788a448 Start address 0x17800000, load size 566358 Transfer rate: 72 KB/sec, 12312 bytes/write. (gdb) b _start Breakpoint 1 at 0x17800000: file ../arch/arm/lib/vectors.S, line 87. (gdb) c Continuing. Breakpoint 1, _start () at ../arch/arm/lib/vectors.S:87 87 ARM_VECTORS (gdb) s reset () at ../arch/arm/cpu/armv7/start.S:40 40 b save_boot_params (gdb) s save_boot_params () at ../arch/arm/cpu/armv7/start.S:120 120 b save_boot_params_ret @ back to my caller (gdb) s save_boot_params_ret () at ../arch/arm/cpu/armv7/start.S:56 56 mrs r0, cpsr (gdb) s 57 and r1, r0, #0x1f @ mask mode bits (gdb) s 58 teq r1, #0x1a @ test for HYP mode (gdb) s 59 bicne r0, r0, #0x1f @ clear all mode bits (gdb) s 60 orrne r0, r0, #0x13 @ set SVC mode (gdb) s s61 orr r0, r0, #0xc0 @ disable FIQ and IRQ (gdb) s s62 msr cpsr,r0 (gdb) s s71 mrc p15, 0, r0, c1, c0, 0 @ Read CP15 SCTLR Register (gdb) s s72 bic r0, #CR_V @ V = 0 (gdb) s 73 mcr p15, 0, r0, c1, c0, 0 @ Write CP15 SCTLR Register (gdb) s s77 ldr r0, =_start (gdb) s 78 mcr p15, 0, r0, c12, c0, 0 @Set VBAR (gdb) s s85 bl cpu_init_cp15 (gdb) s scpu_init_cp15 () at ../arch/arm/cpu/armv7/start.S:143 143 mov r0, #0 @ set up for MCR (gdb) s s144 mcr p15, 0, r0, c8, c7, 0 @ invalidate TLBs (gdb) s s145 mcr p15, 0, r0, c7, c5, 0 @ invalidate icache (gdb) s s146 mcr p15, 0, r0, c7, c5, 6 @ invalidate BP array (gdb) s 147 mcr p15, 0, r0, c7, c10, 4 @ DSB (gdb) s 148 mcr p15, 0, r0, c7, c5, 4 @ ISB (gdb) s s153 mrc p15, 0, r0, c1, c0, 0 (gdb) s s154 bic r0, r0, #0x00002000 @ clear bits 13 (--V-) (gdb) s s155 bic r0, r0, #0x00000007 @ clear bits 2:0 (-CAM) (gdb) s s156 orr r0, r0, #0x00000002 @ set bit 1 (--A-) Align (gdb) s s157 orr r0, r0, #0x00000800 @ set bit 11 (Z---) BTB (gdb) s s161 orr r0, r0, #0x00001000 @ set bit 12 (I) I-cache (gdb) s 163 mcr p15, 0, r0, c1, c0, 0 (gdb) s s172 mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register (gdb) s 173 orr r0, r0, #1 << 4 @ set bit #4 (gdb) s s174 mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register (gdb) s 178 mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register (gdb) s 179 orr r0, r0, #1 << 6 @ set bit #6 (gdb) s 180 mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register (gdb) s 184 mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register (gdb) s 185 orr r0, r0, #1 << 11 @ set bit #11 (gdb) s s186 mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register (gdb) s s189 mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register (gdb) s 190 orr r0, r0, #1 << 21 @ set bit #21 (gdb) s 191 mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register (gdb) s s195 mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register (gdb) s 196 orr r0, r0, #1 << 22 @ set bit #22 (gdb) s 197 mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register (gdb) s 200 mov r5, lr @ Store my Caller (gdb) s s201 mrc p15, 0, r1, c0, c0, 0 @ r1 has Read Main ID Register (MIDR) (gdb) s 202 mov r3, r1, lsr #20 @ get variant field (gdb) s 203 and r3, r3, #0xf @ r3 has CPU variant (gdb) s 204 and r4, r1, #0xf @ r4 has CPU revision (gdb) s 205 mov r2, r3, lsl #4 @ shift variant field for combined value (gdb) s 206 orr r2, r4, r2 @ r2 has combined CPU variant + revision (gdb) s s212 ldr r0, =(CONFIG_SYS_INIT_SP_ADDR) (gdb) s 214 bic r0, r0, #7 /* 8-byte alignment for ABI compliance */ (gdb) s s215 mov sp, r0 (gdb) s scpu_init_cp15 () at ../arch/arm/cpu/armv7/start.S:320 320 mov pc, r5 @ back to my caller (gdb) s save_boot_params_ret () at ../arch/arm/cpu/armv7/start.S:88 88 bl cpu_init_crit (gdb) s cpu_init_crit () at ../arch/arm/cpu/armv7/start.S:340 340 b lowlevel_init @ go setup pll,mux,memory (gdb) s lowlevel_init () at ../arch/arm/cpu/armv7/lowlevel_init.S:31 31 ldr sp, =CONFIG_SYS_INIT_SP_ADDR (gdb) s 33 bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ (gdb) s 44 sub sp, sp, #GD_SIZE (gdb) s 45 bic sp, sp, #7 (gdb) s 46 mov r9, sp (gdb) s 52 push {ip, lr} (gdb) s 67 bl s_init (gdb) s s_init () at ../arch/arm/mach-imx/mx6/soc.c:874 874 if (is_mx6sx() || is_mx6ul() || is_mx6ull() || is_mx6sll()) (gdb) s