Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: 1 range affected (131072 bytes) J-Link: Flash download: Total: 3.591s (Prepare: 0.556s, Compare: 1.339s, Erase: 0.019s, Program & Verify: 1.673s, Restore: 0.003s) J-Link: Flash download: Program & Verify speed: 76 KB/s ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: 1 range affected (131072 bytes) J-Link: Flash download: Total: 3.592s (Prepare: 0.556s, Compare: 1.340s, Erase: 0.019s, Program & Verify: 1.673s, Restore: 0.003s) J-Link: Flash download: Program & Verify speed: 76 KB/s ResetTarget() start Executing ResetTarget() ResetTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 1 @ 0x00200000: 1 range affected (524288 bytes) J-Link: Flash download: Total: 8.862s (Prepare: 0.316s, Compare: 1.766s, Erase: 0.021s, Program & Verify: 6.692s, Restore: 0.064s) J-Link: Flash download: Program & Verify speed: 76 KB/s ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 1 @ 0x00200000: 1 range affected (131072 bytes) J-Link: Flash download: Total: 5.166s (Prepare: 0.317s, Compare: 3.093s, Erase: 0.019s, Program & Verify: 1.672s, Restore: 0.064s) J-Link: Flash download: Program & Verify speed: 76 KB/s ResetTarget() start Executing ResetTarget() ResetTarget() end J-Link: Flash download: Total time needed: 0.550s (Prepare: 0.302s, Compare: 0.000s, Erase: 0.183s, Program: 0.000s, Verify: 0.000s, Restore: 0.064s) J-Link: Flash download: Total time needed: 0.502s (Prepare: 0.300s, Compare: 0.000s, Erase: 0.136s, Program: 0.000s, Verify: 0.000s, Restore: 0.064s) J-Link: Flash download: Total time needed: 0.402s (Prepare: 0.314s, Compare: 0.000s, Erase: 0.022s, Program: 0.000s, Verify: 0.000s, Restore: 0.065s) Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: 3 ranges affected (262144 bytes) J-Link: Flash download: Total: 5.170s (Prepare: 0.557s, Compare: 1.230s, Erase: 0.033s, Program & Verify: 3.346s, Restore: 0.003s) J-Link: Flash download: Program & Verify speed: 76 KB/s ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end Device "TMS570LC4357" selected. InitTarget() start Executing InitTarget() TotalIRLen = 6, IRPrint = 0x01 J-Link script: ICEPick found, enabling Cortex-R5 core. TotalIRLen = 6, IRPrint = 0x01 JTAG chain detection found 1 devices: #0 Id: 0x1B95A02F, IRLen: 06, TI ICEPick InitTarget() end TotalIRLen = 10, IRPrint = 0x0011 JTAG chain detection found 2 devices: #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x1B95A02F, IRLen: 06, TI ICEPick DPv0 detected AP map detection skipped. Manually configured AP map found. AP[0]: AHB-AP (IDR: Not set) AP[1]: APB-AP (IDR: Not set) AP[2]: JTAG-AP (IDR: Not set) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID: 003BBC15 Cortex-R5 Found Cortex-R5 r1p2 8 code breakpoints, 8 data breakpoints Debug architecture ARMv7.0 Data endian: big Main ID register: 0x411FC152 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way TCM Type register: 0x00010001 MPU Type register: 0x00001000 System control register: Instruction endian: big Level-1 instruction cache disabled Level-1 data cache disabled MPU disabled Branch prediction enabled SetupTarget() start Executing SetupTarget() Memory access: CPU temp. halted: https://wiki.segger.com/Memory_accesses#Stop_mode HandleSetup(): Initializing ECC protected RAM SetupTarget() end CPU is running at low speed (4903 kHz). J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match ResetTarget() start Executing ResetTarget() ResetTarget() end ResetTarget() start Executing ResetTarget() ResetTarget() end